Intel Corporation

George K Chen

Alan C Wong

Michael J Keith

Wilman Tsai

Jun-Fei Zheng

Stephen V Wood

Zhihua Li

Hakan Erturk

Atul Gupta

Gary X Cao

Cheng-Chieh Hsieh

Nancy J Wheeler

Jeff Drautz

Joseph D Shindler

Max Lau

Brandon L Ward

Eric Jin Li

Jeffrey S McVeigh

Emily Yixie Shu

Sergei L Voronov

Robert J Reese

George Vakanas

Xuejiao Hu

Yuval Greenzweig

Haiming Jin

Jeffery S McVeigh

Jack Hu

The present invention discloses a method of cooling an ultramobile device with microfins attached to an external wall of an enclosure surrounding the ultramobile device.

Microfins for cooling an ultramobile device

The present invention discloses an apparatus including: a laser beam directed at a wafer held by a chuck mounted on a stage inside a process chamber; a focusing mechanism for the laser beam; a steering mechanism for the laser beam; an optical scanning mechanism for the laser beam; a mechanical scanning system for the stage; an etch chemical induced by the laser beam to etch the wafer and form volatile byproducts; a gas feed line to dispense the etch chemical towards the wafer; and a gas exhaust line to remove any excess of the etch chemical and the volatile byproducts.

Laser-assisted chemical singulation of a wafer

The present invention discloses a method including: providing a Group III-V component semiconductor material; forming a first layer over a surface of the Group III-V component semiconductor material, the first layer to unpin a Fermi level at the surface; forming a second layer over the first layer, the second layer for scaling an equivalent oxide thickness (EOT); and annealing the first layer before or after forming the second layer to remove bulk trap defects in the first layer.

Method of forming high-k dual dielectric stack

High-k dual dielectric stack

In an embodiment of the present invention, a device includes a first etched feature located in a critical dimension scanning electron microscope (CD-SEM) characterization location, the first etched feature having an upper section, a middle section, and a lower section wherein the middle section is severely shrunk relative to a corresponding middle section of a second etched feature having similar dimensions and composition that is not located in a CD-SEM characterization location. In another embodiment of the present invention, the middle section of the first etched feature has a shrinkage carryover exceeding a threshold. In still another embodiment of the present invention, the middle section of the first etched feature exhibits a line edge roughness.

Device having etched feature with shrinkage carryover

In an embodiment of the invention, an apparatus includes a reticle having a frontside including a pattern to be imaged onto a semiconductor wafer, a thin film located over a backside of the reticle to form a global convex shape and to reduce friction when sliding on a chuck, and the chuck having a topside to which the backside of the reticle conforms.

Controlling shape of a reticle with low friction film coating at backside

The present invention discloses a method of forming a gate dielectric film including: providing a channel region in a transistor, the channel region including multiple segments having different sizes, some of which belong to a first surface portion while others belong to a second surface portion wherein the first surface portion and the second surface portion are adjacent; forming a hybrid high-k gate dielectric film over the channel region including: forming a first dielectric material over the first surface portion, the first dielectric material having a sub-monolayer thickness; forming a second dielectric material over the second surface portion, the second dielectric material having a sub-monolayer thickness, and forming a third dielectric film over the first dielectric film and the second dielectric film wherein the third dielectric film is high-k.

Hybrid high-k gate dielectric film

A liquid-crystal-on-silicon device generates an image for projection onto a screen. The device includes a front plane, a back plane including a pixel driving circuit, and a wall that forms a chamber between the front and back planes for holding liquid crystal. Electrodes protrude into the chamber from the front plane, back plane, or both, in a predetermined pattern. The electrodes may be shaped as pillars and may serve as anodes or cathodes or both. When a voltage is applied to the electrodes, the liquid crystal assumes different polarization states at different pixel sites to form an image which may be projected onto a screen.

Method and apparatus of liquid-crystal-on-silicon assembly

The present invention describes a method including: determining field-clustering scheme; selecting initial sample plan; establishing initial model of overlay, the initial model of overlay comprising components; and establishing efficient model of overlay from the initial model of overlay including: constructing matrices; identifying redundant components and eliminating the redundant components; and identifying highly-correlated components and determining whether to eliminate the highly-correlated components.

Dynamic sampling with efficient model for overlay

A CD-SEM (critical dimension-scanning electron microscope) system may utilize a technique for characterizing and reducing shrinkage carryover due to CD-SEM measurements. The system may identify the affects of CD-SEM measurements on the resist and adjust the operating parameters for a particular resist to avoid or significantly reduce shrinkage carryover. In this manner, the system may obtain more reliable CD measurements and avoid damage to the measured feature.

Characterizing resist line shrinkage due to CD-SEM inspection

Optimization of sample plan for overlay

One embodiment of the invention comprises a method and apparatus for managing a plurality of buffers for a video codec. Each buffer has at least one memory storage unit. A first video frame is received. The first video frame is stored in a first memory storage unit. A second video frame is received, the second video frame having said first video frame as a reference frame. The second video frame is stored in a second memory storage unit, with the second memory storage unit being a first predetermined number of memory storage units from the first memory storage unit.

Method and apparatus for buffer management in video processing

A processor has at least two sets of registers. The first set stores a matrix of data, and the second set stores a transposed copy of the matrix of data. When any portion of any row of the first set is modified, the corresponding portion of the column of the transposed copy in the second set is also automatically modified. A method of using two sets of registers for matrix processing by a processor includes storing a matrix of data into a first set of registers, the first set of registers having a first number of registers, each register comprising a first number of storage units, each storage unit storing an element of the matrix, and transposing the matrix of data into a second set of registers, the second set of registers having a second number of registers, each register comprising a second number of storage units. The method also includes referencing one of the first set of registers to operate on a row of the matrix of data, and referencing one of the second set of registers to operate on a column of the matrix of data.

Registers for 2-D matrix processing

A method and apparatus for transcoding a digital video signal is described. A first set of bits encoded in a first encoding format are received. The first set of bits are decoded to discrete cosine transform (DCT) coefficients. The DCT coefficients are transformed into an intermediate exchange format. The transformed DCT coefficients are encoded using a second encoding format.

Growing community of inventors

Portland, OR, United States of America

George K Chen