Novellus Systems Incorporated

Solexel, Inc.

Ob Realty, LLC

Trutag Technologies, Inc.

Intuitive Surgical Operations, Inc.

George D Kamian

Mehrdad M Moslehi

Takao Yonehara

Ming Xi

Karl-Josef Kramer

Eugene Smargiassi

Stephen Yu-Hong Lau

Jay Ashjaee

Somnath S Nag

Subramanian Tamilmani

David Xuan-Qi Wang

Pawan Kapur

Krishnan Shrinivasan

James Forest Lee

Lisa Marie Gytri

Joseph Brett Harris

Jeff Gordon

Carmen Balderrama

Mark Yam

Feng Wang

Stephen V Gentile

Sassan Roham

Peter Woytowitz

Steve Gentile

Virendra V Rana

Sean M Seutter

Anthony Calcaterra

Craig Lyle Stevens

David Mordo

Edward J McInerney

Michael Rivkin

Anand Deshpande

Michael Wingert

Joe Kramer

Martin M Barrera

Yen-Sheng Su

Thom Stalcup

Subbu Tamilmani

Doug Crafts

Krishna Shrinivasan

Brett A Hinze

Narayanan Ranganath

James R Stefani

K-Josef Kramer

Gerry Olsen

Kamran Manteghi

Jay Ash-Jaee

Systems and methods of optical registration in a computer-aided system includes a control system. The control system is configured to provide a first registration indicator having a first indicator pose in a workspace; determine a first robotic device pose in a robotic device reference frame; obtain a first image of the first registration indicator; determine, based on the first image, the first indicator pose in an imaging device reference frame; provide a second registration indicator having a second indicator pose in the workspace; determine a second robotic device pose in the robotic device reference frame; obtain a second image of the second registration indicator; determine, based on the second image, the second indicator pose in the imaging device reference frame; and determine a registration transform between the robotic device reference frame and the imaging device reference frame based on correspondences between the robotic device poses and the indicator poses.

Optical registration in a computer-aided system

Porogen accumulation in a UV-cure chamber is reduced by removing outgassed porogen through a heated outlet while purge gas is flowed across a window through which a wafer is exposed to UV light. A purge ring having specific major and minor exhaust to inlet area ratios may be partially made of flame polished quartz to improve flow dynamics. The reduction in porogen accumulation allows more wafers to be processed between chamber cleans, thus improving throughput and cost.

Method and apparatuses for reducing porogen accumulation from a UV-cure chamber

This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

Apparatus and methods for uniformly forming porous semiconductor on a substrate

A purge ring for providing a gas to a wafer processing chamber includes an inlet ring wall defining a ring hole space. An outer perimeter of the inlet ring wall is elliptical. An outer perimeter of the ring hole space is circular. The inlet ring wall is a continuous structure surrounding the ring hole space. An inlet baffle formed within the inlet ring wall surrounds at least 180 degrees of the outer perimeter of the ring hole space. An inlet plenum arranged in a first end of the inlet ring wall provides the gas to the ring hole space through the inlet baffle. An exhaust channel is formed within the inlet ring wall in a second end of the inlet ring wall. An exhaust outlet hole arranged in the second end of the inlet ring wall exhausts the gas out of the ring hole space via the exhaust channel.

Purging of porogen from UV cure chamber

Method for reducing porogen accumulation from a UV-cure chamber

High productivity thin film deposition methods and tools are provided wherein a thin film semiconductor material layer with a thickness in the range of less than 1 micron to 100 microns is deposited on a plurality of wafers in a reactor. The wafers are loaded on a batch susceptor and the batch susceptor is positioned in the reactor such that a tapered gas flow space is created between the susceptor and an interior wall of the reactor. Reactant gas is then directed into the tapered gas space and over each wafer thereby improving deposition uniformity across each wafer and from wafer to wafer.

High productivity deposition reactor comprising a gas flow chamber having a tapered gas flow space

This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further the disclosure is applicable to the general fields of Photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

High-productivity porous semiconductor manufacturing equipment

Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects as well as Fabrication methods and structures for forming thin film back contact solar cells are described.

High-efficiency solar photovoltaic cells and modules using thin crystalline semiconductor absorbers

An apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates in a batch electrochemical anodic etch process is provided. The apparatus comprises a plurality of edge-sealing template mounts operable to prevent formation of porous silicon at the edges of a plurality of templates. An electrolyte is disposed among the plurality of templates. The apparatus further comprises a power supply operable to switch polarity, change current intensity, and control etching time to produce the porous silicon layers.

Apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates

The present invention relates to curing of semiconductor wafers. More particularly, the invention relates to cure chambers containing multiple cure stations, each featuring one or more UV light sources. The wafers are cured by sequential exposure to the light sources in each station. In some embodiments, the wafers remain stationary with respect to the light source during exposure. In other embodiments, there is relative movement between the light source and the wafer during exposure. The invention also provides chambers that may be used to independently modulate the cross-linking, density and increase in stress of a cured material by providing independent control of the wafer temperature and UV intensity.

Single-chamber sequential curing of semiconductor wafers

It is an object of this disclosure to provide high productivity, low cost-of-ownership manufacturing equipment for the high volume production of photovoltaic (PV) solar cell device architecture. It is a further object of this disclosure to reduce material processing steps and material cost compared to existing technologies by using gas-phase source silicon. The present disclosure teaches the fabrication of a sacrificial substrate base layer that is compatible with a gas-phase substrate growth process. Porous silicon is used as the sacrificial layer in the present disclosure. Further, the present disclosure provides equipment to produce a sacrificial porous silicon PV cell-substrate base layer.

Porous silicon electro-etching system and method

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Scotts Valley, CA, United States of America

George D Kamian