Other

Rsa Protective Technologies, LLC

George D Doland

James C Fletcher

Robert A Frosch

Richard Steven Adler

Mark L Boyer

Risto Salo

Majed Agha

An integrated system comprising a barrier, such as a weir with movable gates, controllably blocks water flow in a natural or concrete lined channel. Without substantially impeding flow in normal conditions, the barrier is configured to back up flood waters to spill into an upstream prepared detention basin. Water is thus kept from downstream areas until subsequently drained through a controlled spill. Multiple units installed in a watershed can store significant amounts of flood water, e.g., during a hurricane, protecting life and property downstream. The electromechanically-operated gates can be operated locally or from a remote control center. Gauges and sensors positioned near the weir and/or throughout the watershed can provide data used to control one or more barriers in the watershed, and the data may be used to train a machine learning model to control the system.

Surface water management system including weir wall and detention pond

Error correcting decoders fall into two catagories, block decoders and convolutional decoders. In either case, the decoder must be synchronized with the received data. For block decoders, an external signal such as that produced by a Frame Synchronizer can be used for this purpose. For many applications, it is preferable to have the decoder acquire synchronization automatically without the need for an external device. This disclosure describes a circuit for automatically synchronizing a block decoder. When the usual or conventional methods are used, a special pattern called the Frame Sync Signal must be transmitted. In this new improved circuit, the synchronization information is contained in the error correcting code with no additional bits being required for synchronization and no reduction in error correcting capability. Because of the relative simplicity of the circuit, it may be incorporated within the decoder or optionally, it may be contained in a separate device. As the principles for operation are so vastly different than other synchronizers, the circuit when produced as a separate device could be correctly called a Decoder Synchronizer. The Autosync Circuit has applications for Error Correcting Decoders which use either short or long block codes.

Autosync circuit for error correcting block decoders

A new and improved secure communication system is provided. A product code, formed from two pseudorandom sequences of digital bits, is used to encipher or scramble data prior to transmission. The two pseudorandom sequences are periodically changed at intervals before they have had time to repeat. One of the two sequences is transmitted continuously with the scrambled data for synchronization. In the receiver portion of the system, the incoming signal is compared with one of two locally generated pseudorandom sequences until correspondence between the sequences is obtained. At this time, the two locally generated sequences are formed into a product code which deciphers the data from the incoming signal. Provision is made to ensure synchronization of the transmitting and receiving portions of the system.

Random digital encryption secure communication system

The error correcting system comprising this invention consists of a Modified Viterbi Decoder concatenated with an Improved Multiple Decoding System. The Modified Viterbi Decoder provides a soft decision quality signal output used by the Improved Multiple Decoder so that the error correcting capabilities of each type decoder are additive yielding net coding gains not heretofore achievable.

Concatenated error correcting system

The present invention provides several new and useful improvements in steering and control of phased array antennas having a small number of elements, typically on the order of 5 to 17 elements. Among the improvements are increasing the number of beam steering positions, reducing the possibility of phase transients in signals received or transmitted with the antennas, and increasing control and testing capacity with respect to the antennas.

Phased array antenna control

This disclosure describes a Multiple Decoding System which includes a means for encoding digital data and decoding by three different methods. These methods are referred to as Parity Decoding which includes Parity I and Parity II Decoding, Sequential Decoding by rank, and a combination of these two methods. This third method is Multiple Decoding and consists of a combination of Parity and Sequential Decoding.

Growing community of inventors

Houston, TX, United States of America

George D Doland