International Business Machines Corporation

George Anthony Caccoma

Frank M Tappen

William O Druschel

Joseph H Koestner

Brian C O'Neill

Paul Philip Castrucci

A batch chip placement system for batch positioning semiconductor chips, or the like, upon a substrate containing an array of chip sites or footprints whose actual position on the substrate deviates from the theoretical or nominal position over successive substrates. The positioning is achieved by first sensing the X and Y offsets of a pair of alignment marks on the substrate from their theoretical or nominal position to determine the .DELTA.X and .DELTA.Y correction factors required to obtain the actual X,Y position of the alignment marks. The actual X,Y position of the alignment marks is used to determine actual X,Y chip position values, .theta. rotation and shrinkage factor corrections required to obtain proper orientation and positioning for batch chip placement.

Batch chip placement system

A computer controlled manufacturing system employing random access semiconductor wafer storage in the fabrication of integrated circuit devices. A computer controlled manufacturing system for fabricating semiconductor wafers into large scale integrated circuit devices and wherein each semiconductor wafer has scored, or recorded thereon, distinct identifying indicia, such as a machine readable serial number. A plurality of concurrently operable semiconductor wafer processing stations are independently computer controlled. Each of the stations performing at least one discrete fabrication step. The manufacturing system including random access wafer storage means having n storage cells, each of said storage cells being adapted to store at least one semiconductor wafer, each of said n storage cells of said random access storage means being individually and randomly addressable under computer control to receive for storage in any predetermined one of said n storage cells a semiconductor wafer, or to provide from storage in any predetermined one of said n storage cells a semiconductor wafer. Reading means for reading the identifying indicia on said semiconductor wafers. Conveying means operative under computer control, said conveying means interconnecting said plurality of computer controlled concurrently operable semiconductor wafer processing stations, and said random access storage means, said conveying means being adapted to convey predetermined wafers to and from said random access storage means and selected ones of said processing stations. A digital computer system operable under stored program control means, said computer system being interconnected with and controlling said processing stations, said random access storage means, said reading means and said conveying means, whereby under computer control selected ones of said semiconductor wafers randomly stored in said random access storage means may be selected and fabricated into first part number large scale integrated circuit devices, and selected second ones of said semiconductor wafers randomly stored in said random access storage means may be selected and fabricated into second part number large scale integrated circuit devices, where said first and second part number devices are not identical.

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Poughkeepsie, NY, United States of America

George Anthony Caccoma