Microsoft Technology Licensing, LLC

Georg Wolfgang Winkler

Roman Mykolayovych Lutchyn

Chetan Vasudeo Nayak

Torsten Karzig

Peter Krogstrup Jeppesen

Michael Hartley Freedman

Charles Masamed Marcus

Andrey Antipov

Dmitry Igorevich Pikulin

Sebastian Heedt

Gijsbertus De Lange

Dmitry Pikulin

Bernard Van Heck

Esteban Adrian Martinez

Mason L Thomas

Geoffrey Charles Gardner

Raymond Leonard Kallaher

Michael James Manfra

Sergei Vyatcheslavovich Gronin

John King Gamble, Iv

Leonardus Petrus Kouwenhoven

Saulius Vaitiekėnas

Jan Philipp Gukelberger

Saulius Vaitiekenas

John David Watson

Lucas Casparis

Bas Nijholt

Rafal Maciej Rechcinski

Dominik André Gresch

Farhad Karimi

John King Gamble Iv

Andreas Simon PÖSCHL

Kevin Alexander Van Hoogdalem

Alisa Danilenko

Eoin Conor O'FARRELL

Deividas Sabonis

A semiconductor-superconductor hybrid device comprises a semiconductor layer and a superconductor layer. The superconductor layer is arranged over an edge of the semiconductor layer so as to enable energy level hybridisation between the semiconductor layer and the superconductor layer. The semiconductor layer is arranged in a sandwich structure between first and second insulating layers, each insulating layer being in contact with a respective opposed face of the semiconductor layer. This configuration may allow for good control over the geometry of the semiconductor layer and may improve tolerance to manufacturing variations. The device may be useful in a quantum computer. Also provided is a method of manufacturing the device, and a method of inducing topological behaviour in the device.

Semiconductor-superconductor hybrid device

Examples described in this disclosure relate to gating a semiconductor layer into a quantum spin Hall insulator state, Certain examples further relate to using quantum spin Hall insulators as topological quantum qubits. Quantum spin Hall systems may rely upon the quantum spin Hall effect by causing a state of a matter to change from a certain phase to an inverted bandgap phase. In one example, the present disclosure relates to a device including a semiconductor layer comprising an active material. The device further includes a gate coupled to the semiconductor layer, where the semiconductor layer is operable in a quantum spin Hall insulator state by using electrons and holes from the active material in response to an application of an electric field to the semiconductor layer via the gate.

Gating a semiconductor layer into a quantum spin hall insulator state

A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes (a) measuring one or both of a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction and a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction, to obtain mapping data and refinement data; (b) finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; and (c) finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

Pre-screening and tuning heterojunctions for topological quantum computer

A device comprising: a portion of semiconductor; a portion of superconductor arranged to a enable a topological phase having a topological gap to be induced in a region of the semiconductor by proximity effect; and a portion of a non-magnetic material comprising an element with atomic number Z greater than or equal to 26, arranged to increase the topological gap in the topological region of the semiconductor.

Semiconductor-superconductor heterostructure

A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes measuring a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space, to obtain refinement data; and finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

A computing device, including memory storing a quantum computing device model. The quantum computing device model may include a plurality of quantum computing device components having a respective plurality of actual boundaries, including a boundary between a superconductor and a semiconductor. The computing device may further include a processor configured to receive, via an application-program interface (API), a nonuniform grid having a nonuniform spacing along at least a first spatial dimension. The processor may receive, via the API, a Schr&#xf6;dinger equation including a Hamiltonian having one or more operators. The processor may discretize the quantum computing device model using the nonuniform grid. The processor may compute a finite-difference solution estimate to the Schr&#xf6;dinger equation over the quantum computing device model as discretized with the nonuniform grid. The processor may output the finite-difference solution estimate via the API.

Nonuniform discretization of quantum computing device model

The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.

Form and fabrication of semiconductor-superconductor nanowires and quantum devices based thereon

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Santa Barbara, CA, United States of America

Georg Wolfgang Winkler