Ams Ag

Austriamicrosystems Ag

Technische Universitat Graz

Georg Röhrer

Jochen Kraft

Martin Knaipp

Robert Kappel

Nenad Lilic

Hubert Enichlmair

Rainer Minixhofer

Gerhard Oberhoffner

Jong Mun Park

Bernhard Löffler

Gerald Meinhardt

Anderson Singulani

Sara Carniello

Ewald Wachmann

András Mozsáry

Anderson Pires Singulani

Roswitha Pummer

Bernard Löffler

Othmar Leitner

Fernando Jesus Castano Sanchez

Paul Maierhofer

Fernando Castano

A semiconductor body comprises a buried layer of a first type of conductivity, a first region of the first type of conductivity, a shallow region of a second type of conductivity at a first surface of the semiconductor body, a sinker of the first type of conductivity located at the first surface of the semiconductor body, and a separating region of the first type of conductivity encircling at least one of the sinker and the buried layer. The first region is between the buried layer and the shallow region.

Semiconductor body, avalanche photodiode and method for fabricating a semiconductor body

The particle sensor device comprises a substrate, a photodetector, a dielectric on or above the substrate, a source of electromagnetic radiation, and a through-substrate via in the substrate. The through-substrate via is exposed to the environment, in particular to ambient air. A waveguide is arranged in or above the dielectric so that the electromagnetic radiation emitted by the source of electromagnetic radiation is coupled into a portion of the waveguide. A further portion of the waveguide is opposite the photodetector, so that said portions of the waveguide are on different sides of the through-substrate via, and the waveguide traverses the through-substrate via.

Particle density sensor using evanescent wave of waveguide

The SPAD device comprises a single-photon avalanche diode and a further single-photon avalanche diode having breakdown voltages, the single-photon avalanche diodes being integrated in the same device. The breakdown voltages are equal or differ by less than 10%. The single-photon avalanche diode is configured to enable to induce triggering or to have a dark count rate that is higher than the dark count rate of the further single-photon avalanche diode.

SPAD device for excess bias monitoring

A charge pump circuit arrangement includes a multitude of capacitors of a first and a second group controlled by non-overlapping clock pulses. The capacitors are partly realized in a semiconductor substrate including a deep well doping region and a high voltage doping region surrounded by the deep well doping region. Switches are connected to a pair of capacitors to control the deep well doping regions with signals in phase with the corresponding clock signal.

Charge pump circuit arrangement

The semiconductor device comprises a bipolar transistor with emitter, base and collector, a current or voltage source electrically connected with the emitter, and a quenching component electrically connected with the collector, the bipolar transistor being configured for operation at a collector-to-base voltage above the breakdown voltage.

Semiconductor device with single electron counting capability

A avalanche diode arrangement comprises an avalanche diode () that is coupled to a first voltage terminal () and to a first node (), a latch comparator () with a first input () coupled to the first node (), a second input () for receiving a reference voltage (VREF) and an enable input () for receiving a comparator enable signal (CLK), and a quenching circuit () coupled to the first node ().

Avalanche diode arrangement and method for controlling an avalanche diode arrangement

A Hall sensor (HS) comprises at least four sensor terminals (EXT_A, EXT_B, EXT_C, EXT_D) for connecting the Hall sensor (HS) in at least two Hall sensing elements () connected together, element terminals (A, B, C, D) of the Hall sensing elements () are connected in between the sensor terminals (EXT_A, EXT_B, EXT_C, EXT_D). Each of the Hall sensing elements () is configured to provide an individual sensor value between two of its element terminals (A, B, C, D). The at least two Hall sensing elements () are distributed basically equally into two halves (B, B) and are connected such that a difference value is electrically formed between two of the sensor terminals (EXT_A, EXT_B, EXT_C, EXT_D) resulting from the respective individual sensor values. The individual sensor values of one half (B) form a minuend of the difference value and the individual sensor values of the other half (B) form a subtrahend of the difference value such that the minuend and the subtrahend cancel out each other in case a homogeneous magnetic field of the same intensity and the same direction is applied to both halves (B, B).

Hall sensor and sensor arrangement

A Hall sensor comprises at least three Hall sensor elements () that respectively comprise at least three element terminals (A, B, C, D, E, F, G, H) and are interconnected in a circuit grid with a structure that is more than one-dimensional, as well as at least three sensor terminals (EXT_A, EXT_B, EXT_C, EXT_D) for contacting the Hall sensor. In this case, each sensor terminal (EXT_A, EXT_B, EXT_C, EXT_D) is connected to at least one of the Hall sensor elements () at one of its element terminals (A, B, C, D, E, F, G, H).

Hall sensor with hall sensor elements that respectively comprise element terminals and are interconnected in a circuit lattice

According to a method for operating a Hall sensor assembly, at least two values (I, I) of an input signal (I) of a Hall sensor () of the Hall sensor assembly () having different magnitudes are set and the associated values (V, V) of an output signal (V) of the Hall sensor () are determined. Furthermore, a residual offset value (k, VOFF) of the output signal (V) is determined according to the values (V, V) of the output signal (V) that were determined at the at least two values (I, I) of the input signal (I).

Method for operating a hall sensor arrangement and hall sensor arrangement

The Hall sensor semiconductor component comprises an arrangement of at least two Hall sensors () with signal connections () and supply connections (), and a switching network, which varies the positions of the supply connections in successive phases and connects the Hall sensors in series in each phase via the respective signal connections.

Hall sensor semiconductor component and method for operating the hall sensor semiconductor component

An isolation area () is provided over a drift region () with a spacing (d) to a contact area () provided for a drain connection (D). The isolation area is used as an implantation mask, in order to produce a dopant profile of the drift region in which the dopant concentration increases toward the drain. The implantation of the dopant can be performed instead before the production of the isolation area, and the later production of the isolation area () changes the dopant profile also in a way that the dopant concentration increases toward the drain.

High-voltage transistor with high current load capacity and method for its production

A high-voltage NMOS transistor with low threshold voltage. The body doping that defines the channel region is in the form of a deep p-well. An additional shallow p-doping is arranged as a channel stopper on the transistor head. This additional shallow p-doping is produced in the semiconductor substrate at the end of the deep p-well that faces away from the channel region, and extends up to a location underneath a field oxide region that encloses the active window. The leakage current of the parasitic transistor at the transistor head is suppressed with the channel stopper.

High-voltage transistor and component containing the latter

In order to detect light with in particular a high blue component, the inversion zone and the space charge zone of a CMOS-like structure are used. In conjunction with an at least partly transparent gate electrode, in particular a transparent conductive oxide or a patterned gate electrode, it becomes possible to absorb the short-wave component of incident light within the inversion zone and to reliably conduct away the generated charge carrier pairs to first and second contacts. During operation, a control voltage is applied to the gate electrode with a magnitude that generates a continuous inversion zone below the optionally patterned gate electrode.

Light-sensitive component

A semiconductor body () comprises a connecting lead () for contacting a semiconductor area (). The conductivity S per unit length of the connecting lead () changes from a first value SW to a second value S. The semiconductor area () is electrically conductively connected to the connecting lead ().

Semiconductor body and method for the design of a semiconductor body with a connecting line

A MOSFET comprising a substrate of a semiconductor material; source/drain regions, which are arranged at a distance from each other at a surface of the substrate; a gate electrode arranged above an area of the surface of the substrate between the source/drain regions, the gate electrode being electrically insulated from the semiconductor material; at least one recess in the gate electrode, a through-contact arranged in the recess of the gate electrode, the through-contact being electrically insulated from the gate electrode; a terminal contact on the semiconductor material; and a terminal conductor arranged on the side of the gate electrode that faces away from the substrate, wherein the through-contact electrically connects the terminal contact to the terminal conductor.

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Graz, Austria

Georg Röhrer