Dongbu Electronics, Co. Ltd.

Dongbu Anam Semiconductor, Inc.

Anam Semiconductor Inc.

Dongbu Hitek Co., Ltd.

Geon-Ook Park

A semiconductor device and a fabrication method thereof in which the semiconductor device includes capacitors having a metal/insulator/metal (MIM) structure are disclosed. The method includes forming an interlayer insulating film on a structure of a semiconductor substrate that exposes lower wiring and a lower insulating film; selectively etching the interlayer insulating film to form a first electrode opening that exposes the lower wiring; forming a first electrode in the first electrode opening such that the first electrode opening is filled; selectively etching the interlayer insulating film at a region of the same adjacent to the first electrode to thereby form a second electrode opening; forming a dielectric layer along inner walls that define the second electrode opening; forming a second electrode on the dielectric layer in such a manner to fill the second electrode opening; and forming upper wiring on at least a portion of the second electrode.

Semiconductor device and fabrication method thereof

Semiconductor devices and methods of fabricating the same are disclosed. One example method may include forming sequentially a pad oxide film and a silicon nitride film on an entire surface of a semiconductor substrate, forming the trench by etching the silicon nitride film and the semiconductor substrate up to a predetermined depth, and forming a liner oxide film with a thickness thinner than that of the silicon nitride film on an inner wall of the trench. The example method may also include applying a negative voltage to a back surface of the semiconductor substrate and forming an insulation film to fill the trench on the liner oxide film.

Semiconductor devices and methods to form trenches in semiconductor devices

Semiconductor devices and methods of manufacturing the same are disclosed. A disclosed semiconductor device comprises a semiconductor substrate; a gate formed on the semiconductor substrate; a gate oxide layer interposed between the semiconductor substrate and the gate; and source and drain regions formed within the substrate at opposite sides of the gate. The gate oxide layer has a first region with a first thickness and a second region with a second thickness. The second thickness is thicker than the first thickness.

Semiconductor devices and methods of manufacturing the same

A flash memory and a fabrication method thereof, which is capable of improving a whole capacitance of the flash memory by forming a tunneling oxide and a floating gate only in a portion where injection of electrons occurs. A flash memory wherein a tunneling oxide and a floating gate are formed only in a portion where injection of electrons occurs and a gate insulation film is formed on a semiconductor substrate between two portions of the tunneling oxide.

Flash memory and fabrication method thereof

Methods for fabricating a shallow trench isolation (STI) of a semiconductor device are disclosed. A disclosed method includes: forming a trench on a semiconductor substrate, forming an oxide layer on the semiconductor substrate and the trench, forming a photoresist pattern on the oxide layer exposing the oxide layer on a bottom surface of the trench, forming STI films on sidewalls of the trench by etching the exposed oxide layer using the photoresist pattern as an etch protection layer, removing the photoresist pattern, developing an epitaxial layer between the STI, and planarizing the epitaxial layer and the oxide layer.

Methods for fabricating an STI film of a semiconductor device

A method for forming a trench in a semiconductor device is disclosed. An example method forms a pad oxide film and a silicon nitride film on a semiconductor substrate, selectively etches the silicon nitride film and the pad oxide film on a region to be formed with a trench, and implants oxygen ions into the semiconductor substrate in the region to be formed with the trench. The example method also forms an oxide in the semiconductor substrate by reacting the oxygen ions with the semiconductor substrate through a thermal diffusion of the oxygen ions, forms the trench by etching the semiconductor substrate and the oxide on the region to be formed with the trench using the silicon nitride film as a mask, forms a liner oxide film on an inner wall of the trench using a thermal diffusion process, and forms an insulation film on the liner oxide film such that the trench is filled.

Method of forming a trench in a semiconductor device

A method for manufacturing a metal-oxide-semiconductor transistor prevents the occurrence of a contact spiking phenomenon. The method includes forming a metal thin film and an isolation oxidation film on a semiconductor substrate, and selectively etching the isolation oxidation film such that the isolation oxidation film is left remaining only over a field oxidation film; heat treating the semiconductor substrate to form silicide by the metal thin film in gate, source, and drain regions; removing portions of the metal thin film that is not formed into silicide, that is, removing unreacted metal thin film; removing the isolation oxidation film left remaining on the field oxidation film; and heat treating the semiconductor substrate in an oxygen environment to form the unreacted metal thin film remaining on the field oxidation film into a metal oxidation film. The present invention is related also to a semiconductor device that employs a metal-oxide-semiconductor transistor made using the method.

Method for manufacturing MOS transistor and semiconductor device employing MOS transistor made using the same

A method for manufacturing a semiconductor device includes forming a barrier layer on an individual device formed on a semiconductor substrate and including a MOS transistor. An ozone process is performed on the barrier layer. A pre-metal dielectric (I'MD) layer is then formed on the barrier layer.

Method for manufacturing semiconductor device including an ozone process

The present invention is directed to a method of forming a gate electrode in a semiconductor device, which is capable of reducing a line width of the gate electrode by performing a photolithography process after defining a wide region on which a gate electrode is located on a photoresist twice such that the line width of the gate electrode is not subject to a wavelength of a light source used when the photolithography process is performed. The method comprises forming a gate oxide on a semiconductor substrate, depositing a polysilicon on the gate oxide, forming a mask thin film on the polysilicon, patterning the mask thin film using a photolithography process twice, wherein one photolithography process is performed with a mask pattern which masks neighboring gate electrode areas and an area between the neighboring gate electrode areas, another photolithography process is performed with a mask pattern which exposes the area between the neighboring gate electrode areas, etching the polysilicon using the mask thin film pattern, and removing the mask thin film pattern on the polysilicon.

Formation method of gate electrode in a semiconductor process

A manufacturing method for fabricating flash memory semiconductor devices is disclosed. According to one example, the manufacturing method may include: forming a trench on a silicon substrate by forming a photoresist pattern on the silicon substrate and performing an etching process using the photoresist pattern; growing a tunneling oxide layer, after removing the photoresist pattern, on a portion of the silicon substrate corresponding to bottom surface of the trench using thermal oxidation process; filling up the trench, after growing the tunneling oxide, by depositing a floating gate poly silicon layer; forming a floating gate, after completion of trench filling, by planarizing the floating gate poly silicon layer to make the height of the floating gate poly silicon layer the same as the silicon substrate; forming a dielectric layer on the floating gate and the silicon substrate; forming a control gate by depositing a control gate poly silicon layer, which serves as a substantial electrode, on the dielectric layer; forming a gate by etching the control gate and the dielectric layer together using photolithography and etching processes for gate defining; performing an oxidation process to the defined gate, which is remained after the etching, to perform oxidation of surrounding area of the defined gate, forming a sidewall by depositing a silicon nitride layer and etching the silicon nitride layer without a separate photolithography process, and performing an implanting process for forming a source and a drain.

Methods of manufacturing flash memory semiconductor devices

Method for manufacturing a MOS transistor that prevents contact spiking and semiconductor device employing a MOS transistor made using the same

A fabrication method of a semiconductor device includes forming an interlayer dielectric film over an entire surface of a semiconductor substrate that includes a lower line. A barrier layer having an etching rate that is lower than an etching rate of the interlayer dielectric film is formed on the interlayer dielectric film. The barrier layer is selectively etched to expose a predetermined region of the interlayer dielectric film. Next, a photoresist pattern is formed on the barrier layer having an opening of a predetermined area corresponding to the exposed region of the interlayer dielectric film. The opening of the photoresist pattern has an area that is greater than an area of the exposed region of the interlayer dielectric film. The line opening and the via are then simultaneously formed by etching the exposed regions of the barrier layer and the interlayer dielectric film. Finally, a metal plug is formed by filling the line opening and the via with a metal material.

Growing community of inventors

Seoul, South Korea

Geon-Ook Park