Alcatel

Alcatel Lucent

Alcatel Internetworking, Inc.

Xylan Corporation

Other

Geoffrey C Stone

John W Bailey

Michael E See

Charles L Panza

Yuri Pikover

Christopher Haywood

Robert Leon Sangroniz

Wai King

Michele Wright Goodwin

Scot A Reader

A user authentication service for a communication network authenticates local users before granting them access to personalized sets of network resources. Authentication agents on intelligent edge devices present users of associated end systems with log-in challenges. Information supplied by the users is forwarded to an authentication server for verification. If successfully verified, the authentication server returns to the agents authorized connectivity information and time restrictions for the particular authenticated users. The agents use the information to establish rules for filtering and forwarding network traffic originating from or destined for particular authenticated users during authorized time periods. An enhanced authentication server may be engaged if additional security is desired. The authorized connectivity information preferably includes identifiers of one or more virtual local area networks active in the network. Log-in attempts are recorded so that the identity and whereabouts of network users may be monitored from a network management station.

Deterministic user authentication service for communication network

A LAN switch has a backplane matrix in which each controller has a dedicated packet bus for propagating packet data. Each bus has a root interfacing with the transmitting (root) controller and a plurality of leaves interfacing with receiving (leaf) controllers. This configuration enables each controller to simultaneously transmit packet data on the root of a bus and receive packet data off a plurality of leaves of other buses without contention. An efficient filtering and stalling system employed at the receive side of the backplane prevents the highly parallel traffic from causing receive side congestion.

Dedicated bandwidth data communication switch backplane

Methods for configuring, maintaining connectivity in and utilizing an ATM network. Neighboring switches share topology information and enable links to neighboring switches for tag switching. Point-to-point tagged virtual connections are established between switches on the best and next-best paths learned from topology information. Point-to-multipoint tagged virtual connections are established on the spanning tree path. Multiple tag allocation requests are included in a single message to preserve bandwidth. Next-best paths are established to reduce latency in event of link failure. Forwarding operations may be performed in hardware to reduce latency during message forwarding.

Self-configuring communication network

A dedicated bandwidth switch backplane has efficient receive processing capable of handling highly parallel traffic. Packets must pass a filtering check and a watermark check before the receive port is allowed to release them to a queue. Highly efficient algorithms are applied to conduct the checks on the packets in a way which expedites receive processing and avoids contention. A hybrid priority/port-based arbitration algorithm is used to sequence filtering checks on pending packets. A watermark comparison algorithm performs preliminary calculations on the current packet using 'projected' output queue write addresses for each possible outcome of the queueing decision on the preceding packet and using the actual outcome to select from among preliminary calculations to efficiently address the outcome-dependence of the current packet's watermark check on the queueing decision made on the preceding packet. Receive ports are operatively divided into full-write receive ports and selective-write receive ports for delivering their packets to the output queue. On the clock cycles where the selective-write receive port is assigned writing privileges, data is read from the queue, unless the selective-write receive port has indicated it wishes to write to the queue, in which case the selective-write receive port writes to the queue. The full-write receive ports always write data, if available, to the queue on the clock cycles where they are assigned writing privileges.

Receive processing for dedicated bandwidth data communication switch backplane

A method and apparatus for maintaining packet order integrity in a switching engine wherein inbound packets are forwarded to different ones of parallel processing elements for switching. Order preservation for packets relating to the same conversation is guaranteed by checking for each inbound packet whether a previous packet from the same source is pending at a processing element and, if the check reveals that such a packet is pending, forwarding the inbound packet to the same processing element as the previous packet.

Method and apparatus for maintaining packet order integrity in parallel switching engine

A dedicated bandwidth switch backplane has efficient receive processing capable of handling highly parallel traffic. Packets must pass a filtering check and a watermark check before the receive port is allowed to release them to a queue. Highly efficient algorithms are applied to conduct the checks on the packets in a way which expedites receive processing and avoids contention. A hybrid priority/port-based arbitration algorithm is used to sequence filtering checks on pending packets. A watermark comparison algorithm performs preliminary calculations on the current packet using &ldquo;projected&rdquo; output queue write addresses for each possible outcome of the queueing decision on the preceding packet and using the actual outcome to select from among preliminary calculations to efficiently address the outcome-dependence of the current packet's watermark check on the queueing decision made on the preceding packet. Receive ports are operatively divided into full-write receive ports and selective-write receive ports for delivering their packets to the output queue. On the clock cycles where the selective-write receive port is assigned writing privileges, data is read from the queue, unless the selective-write receive port has indicated it wishes to write to the queue, in which case the selective-write receive port writes to the queue. The full-write receive ports always write data, if available, to the queue on the clock cycles where they are assigned writing privileges.

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Malibu, CA, United States of America

Geoffrey C Stone