Tokyo Electron Limited

Genji Nakamura

Yoshihide Tada

Toshio Nakanishi

Shigenori Ozaki

Takuya Sugawara

Seiji Matsuyama

Masaru Sasaki

Shigeru Nakajima

Tomonori Fujiwara

Kazuhide Hasebe

Toshio Hasegawa

Kandabara N Tapily

Masayuki Imai

Yasushi Akasaka

Shigeo Ashigaki

Yumiko Kawano

Hideaki Yamasaki

Naoki Shindo

Akitaka Shimizu

Takashi Matsumoto

Shingo Hishiya

Yoshihiro Hirota

Yutaka Fujino

Gert J Leusink

Masato Kushibiki

Hiroaki Ikegawa

Yusuke Muraki

Ryota Ifuku

Takamichi Kikuchi

Takahiro Hakamata

Hajime Nakabayashi

Yoshihiro Kato

Mikio Suzuki

Dong-Kyun Choi

Tsukasa Yonekawa

Makoto Wada

Junya Miyahara

Muneyuki Otani

Glenn W Gale

Tomoyuki Sakoda

Kentaro Shiraga

Anri Nakajima

Sara Aoki

Masaru Sasakii

Shin Yokoyama

Asami Suemura

Sara Otsuki

Kazuya Takahashi

Philippe Gaubert

Nobutake Kabuki

Hiroshi Terada

A film forming method includes: a loading process of loading a substrate into a processing container; a first process of forming an interface layer having an amorphous structure or a microcrystalline structure on the substrate by plasma of a first mixed gas including a carbon-containing gas; and a second process of forming a graphene film on the interface layer by plasma of a second mixed gas including the carbon-containing gas.

Film forming method and film forming apparatus

A method of manufacturing a semiconductor device includes a first laminating step, a second laminating step, a third laminating step, a first annealing step, and a fourth laminating step. In the first laminating step, a first electrode film is laminated on a substrate. In the second laminating step, a capacitive insulator is laminated on the first electrode film. In the third laminating step, a metal oxide is laminated on the capacitive insulator. In the first annealing step, the first electrode film, the capacitive insulator, and the metal oxide, which are laminated on the substrate, are annealed. In the fourth laminating step, a second electrode film is laminated on the annealed metal oxide. The capacitive insulator is an oxide that contains at least one of zirconium and hafnium, and the metal oxide is an oxide that contains at least one of tungsten, molybdenum, and vanadium.

Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device according to the present disclosure includes forming a stack by alternately stacking insulating films and sacrificial films on a substrate; forming, in the stack, a through-hole extending in a thickness direction of the stack; forming a block insulating film, a charge trapping film, a tunnel insulating film, and a channel film on an inner surface of the through-hole in this order; forming, in the stack, a slit extending in the thickness direction of the stack separately from the through-hole; removing the sacrificial films through the slit so as to form a recess between adjacent insulating films; forming a first metal oxide film on an inner surface of the recess; forming, on the first metal oxide film, a second metal oxide film having a crystallization temperature lower than that of the first metal oxide film; and filling the recess with an electrode layer.

Method of manufacturing semiconductor device and semiconductor device

A plurality of embodiments for ReRAM devices and method of making are described. According to one embodiment, the ReRAM device includes a first electrode film formed on a substrate, a metal oxide film with oxygen vacancies formed on a first electrode film, a conformal TiAlC film, oxidized by diffused oxygen atoms from the metal oxide film, formed on the metal oxide film, and a second electrode film formed on the TiAlC film. According to another embodiment, the ReRAM device includes a pair of vertical metal oxide films, a pair of vertical conformal TiAlC films formed on the pair of vertical metal oxide films, the pair of vertical conformal TiAlC films oxidized by diffused oxygen atoms from the pair of vertical metal oxide films, and an electrode film formed between the pair of vertical conformal TiAlC films.

Resistive random accress memory containing a conformal titanium aluminum carbide film and method of making

Embodiments of the invention describe parasitic capacitance reduction structure for nanowire transistors and method of manufacturing. According to one embodiment the method includes providing a substrate, forming a first nanowire on the substrate, forming a second nanowire on the first nanowire, forming a first dielectric layer between the substrate and the first nanowire, and forming a second dielectric layer between first dielectric layer and the second nanowire, where the second dielectric layer has a higher dielectric constant than the first dielectric layer. According to one embodiment, a nanowire transistor includes a first nanowire on a substrate, a second nanowire on the second nanowire, a first dielectric layer between the substrate and the first nanowire, and a second dielectric layer between the first dielectric layer and the second nanowire, where the second dielectric layer has a higher dielectric constant than the first dielectric layer.

Parasitic capacitance reduction structure for nanowire transistors and method of manufacturing

A method for manufacturing an insulating film laminated structure includes a step of forming a first high-k film on a semiconductor substrate, a step of processing the semiconductor substrate in a processing chamber of a plasma processing apparatus by using a plasma to form an oxide film on an interface between the semiconductor substrate and the first high-k film, and a step of forming a second high-k film on the first high-k film. A plasma oxidation process is performed by using a plasma of an oxygen-containing gas at a processing temperature of the semiconductor substrate in a range from 20&#xb0; C. to 145&#xb0; C. while setting a power density of a total power of microwaves to be within a range from 0.035 kW/mto 3.5 kW/mwith respect to a total area of a conductive member facing an inner space of the processing chamber and microwave transmitting windows.

Method for manufacturing insulating film laminated structure

Embodiments of the invention describe a method for forming a nanowire structure on a substrate. According to one embodiment, the method includes a) depositing a first semiconductor layer on the substrate, b) etching the first semiconductor layer to form a patterned first semiconductor layer, c) forming a dielectric layer across the patterned first semiconductor layer, and d) depositing a second semiconductor layer on the patterned first semiconductor layer and on the dielectric layer. The method further includes e) repeating a)-d) at least once, f) following e), repeating a)-c) once, g) etching the patterned first semiconductor layers, the dielectric layers, and the second semiconductor layers to form a fin structure, and h) removing the patterned first semiconductor layers from the fin structure.

Method for forming a nanowire structure

A method of forming a semiconductor device is disclosed in various embodiments. The method includes providing a substrate containing first and second device regions, and a high-k film on the substrate, depositing a metal nitride gate electrode film on the high-k film, forming a metal-containing gate electrode film on the metal nitride gate electrode film in the second device region but not in the first device region, and depositing a Si-based cap layer on the metal-containing gate electrode film in the second device region and on the metal nitride gate electrode film in the first device region.

CMOS Vt control integration by modification of metal-containing gate electrodes

Embodiments of the invention provide dual workfunction semiconductor devices and methods for manufacturing thereof. According to one embodiment, the method includes providing a substrate containing first and second device regions, depositing a dielectric film on the substrate, and forming a first metal-containing gate electrode film on the dielectric film, wherein a thickness of the first metal-containing gate electrode film is less over the first device region than over the second device region. The method further includes depositing a second metal-containing gate electrode film on the first metal-containing gate electrode film, patterning the second metal-containing gate electrode film, the first metal-containing gate electrode film, and the dielectric film to form a first gate stack above the first device region and a second gate stack above the second device region.

Dual workfunction semiconductor devices and methods for forming thereof

An insulting film is modified by subjecting the insulting film to a modification treatment comprising a combination of a plasma treatment and a thermal annealing treatment. There is provided a method of enhancing the characteristic of an insulating film by improving deterioration in the characteristic of the insulating film due to carbon, a suboxide, a dangling bond or the like contained in the insulating film.

Method of modifying insulating film

The present invention is a method of manufacturing a semiconductor device from a layered body including: a semiconductor substrate; a high dielectric film formed on the semiconductor substrate; and an SiC-based film formed on a position upper than the high dielectric film, the SiC-based film having an anti-reflective function and a hardmask function. The present invention comprises a plasma-processing step for plasma-processing the SiC-based film and the high dielectric film to modify the SiC-based film and the high dielectric film by an action of a plasma; and a cleaning step for wet-cleaning the SiC-based film and the high dielectric film modified in the plasma-processing step to collectively remove the SiC-based film and the high dielectric film.

Method for manufacturing semiconductor device

In a method for manufacturing a semiconductor device, an insulating film is formed on an entire surface of a substrate having a device isolation region and a first and a second conductive region. Then, a semiconductor device structure having a gate electrode forming region is formed on each of the conductive regions, the insulating film being disposed between the gate electrode forming region and each of the conductive regions. A gate electrode groove is formed in the gate electrode forming region of the semiconductor device structure, the insulating film being removed in the gate electrode groove. Thereafter, a gate insulating film and a film of metal gate electrode material are deposited on a bottom surface and a side surface of the gate electrode groove and an alloy is formed by alloying the film of metal gate electrode material deposited in a gate electrode groove of the first conductive region.

Semiconductor device and manufacturing method thereof

A method for integrating a metal-containing film in a semiconductor device, for example a gate stack. In one embodiment, the method includes providing a substrate in a process chamber, depositing the tungsten-containing film on the substrate at a first substrate temperature by exposing the substrate to a deposition gas containing a tungsten carbonyl precursor, heat treating the tungsten-containing film at a second substrate temperature greater than the first substrate temperature to remove carbon monoxide gas from the tungsten-containing film, and forming a barrier layer on the heat treated tungsten-containing film. Examples of tungsten-containing films include W, WN, WSi, and WC. Additional embodiments include depositing metal-containing films containing Ni, Mo, Co, Rh, Re, Cr, or Ru from the corresponding metal carbonyl precursors.

Method of integrating metal-containing films into semiconductor devices

In a process involving the formation of an insulating film on a substrate for an electronic device, the insulating film is formed on the substrate surface by carrying out two or more steps for regulating the characteristic of the insulating film involved in the process under the same operation principle. The formation of an insulating film having a high level of cleanness can be realized by carrying out treatment such as cleaning, oxidation, nitriding, and a film thickness reduction while avoiding exposure to the air. Further, carrying out various steps regarding the formation of an insulating film under the same operation principle can realize simplification of the form of an apparatus and can form an insulating film having excellent property with a high efficiency.

Method for forming insulation film

Growing community of inventors

Nirasaki, Japan

Genji Nakamura