Peking University

North China Electric Power University

Gengyu Yang

Ru Huang

Yimao Cai

Yu Jia Tang

Lijie Zhang

Jing Yan Ma

Yue Pan

Yinglong Huang

Jiewen Fan

Qianqian Huang

Runsheng Wang

Poren Tang

Yujie Ai

Jibin Zou

Ruifeng Wang

Yuchong Wu

Shiqiang Qin

Shenghu Tan

The disclosure relates to a method and system for evaluating the stability of HVDC receiving end system and storage medium, which relates to the technical field of high voltage direct current transmission. The method includes: collecting voltage at a generator port, current at the generator port and rotational speed of the generator after eliminating fault; determining a corresponding relationship between the generator dynamic energy and the time according to the voltage at the generator port, the current at the generator port and the rotational speed of the generator; determining the attenuation intensity of the generator dynamic energy according to the corresponding relationship between the generator dynamic energy and the time; determining stability of the HVDC receiving end system according to the attenuation intensity of the generator dynamic energy.

Method and system for evaluating stability of HVDC receiving end system, and storage medium

The present invention discloses a multilevel resistive memory having large storage capacity, which belongs to a field of a fabrication technology of a resistive memory. The resistive memory includes an top electrode and a bottom electrode, and a combination of a plurality of switching layers and defective layers interposed between the top electrode and the bottom electrode, wherein, the top electrode and the bottom electrode are respectively contacted with a switching layer (a film such as TaO, TiO, HfO), and the defective layers (metal film such as Ti, Au, Ag) are interposed between the switching layers. By using the present invention, a storage capacity of a resistive memory can be increased.

Multilevel resistive memory having large storage capacity

The invention provides a high voltage-resistant lateral double-diffused transistor. The lateral double-diffused MOS transistor includes a channel region, a gate dielectric, a gate region, a source region, a drain region, a source end extension region and a drain end S-shaped drifting region, wherein the channel region has a lateral cylindrical silicon nanowire structure, on which a layer of gate dielectric is uniformly covered, the gate region is on the gate dielectric, the gate region and the gate dielectric completely surround the channel region, the source end extension region lies between the source region and the channel region, the drain end S-shaped drifting region lies between the drain region and the channel region, the plan view of the drain end S-shaped drifting region is in the form of single or multiple S-shaped structure(s), and an insulating material with a relative dielectric constant of 1-4 is filled within the S-shaped structure(s).

High voltage-resistant lateral double-diffused transistor based on nanowire device

The present invention discloses a flash memory and the fabrication method and the operation method for the same. The flash memory comprises two memory cells of vertical channels, wherein a lightly-doped N type (or P type) silicon is used as a substrate; a P+ region (or an N+ region) is provided on each of the both ends of the silicon surface, and two channel regions perpendicular to the surface are provided therebetween; an N+ region (or a P+ region) shared by two channels is provided over the channels; a tunneling oxide layer, a polysilicon floating gate, a block oxide layer and a polysilicon control gate are provided sequentially on the outer sides of each channel from inside to outside; and the polysilicon floating gate and the polysilicon control gate are isolated from the P+ region by a sidewall oxide layer. The whole device is a two-bit TFET type flash memory with vertical channels which has better compatibility with prior-art standard CMOS process. As compared with a conventional MOSFET-based flash memory, the flash memory according to the present invention possesses various advantages such as high programming efficiency, low power consumption, effective inhibition of punch-through effect, and high density, etc.

Flash memory and fabrication method and operation method for the same

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Beijing, China

Gengyu Yang