Qualcomm Incorporated

Gene Hyde McAllister

Dongwon Seo

Hayg-Taniel Dabag

Seyfollah Seyfollahi Bazarjani

Prajakt Kulkarni

Jeffrey Mark Hinrichs

Guoqing Miao

Reynante Tamunan Alvarado

Lizabeth Ann Keser

Joseph Robert Fitzgerald

Eric Ian Mikuteit

Damion B Gastelum

Nathaniel B Wilson

Justin Joseph Rosen Gagne

Steve Joseph Bezuk

Christine Sung-An Hau-Riege

Juha Oikarinen

Jan Paul Van Der Wagt

Kevin Patrick Caffey

You-Wen Yau

Faster charging of a battery, including: opening a first switch disposed between an input node of the battery and an input node of a load to decouple the input node of the battery from the input node of the load; and charging the battery using a first charging source coupled to the input node of the battery while the load is being powered through the input node of the load via a second charging source having a charge rate slower than the first charging source.

System and method for charging of a battery

A system and method of improving the efficiency in the power consumption of an audio system. In essence, the technique is to adjust the power delivered from the power supply to the analog section, such as the power amplifier, in response to the volume level indicated by the volume control module and/or in response to the detected characteristic of the input audio signal. Thus, in this manner, the analog section is operated in a manner that is related to the level of the signal it is processing. Additionally, the system and method also relate to a technique of adjusting the dynamic ranges of the digital signal and the analog signal to improve the overall dynamic range of the system without needing to consume additional power.

System and method of reducing power consumption for audio playback

Some implementations provide a semiconductor device (e.g., die) that includes a substrate, several metal layers and dielectric layers coupled to the substrate, a pad coupled to one of the plurality of metal layers, a first metal redistribution layer coupled to the pad, and a second metal redistribution layer coupled to the first metal redistribution layer. The second metal redistribution layer includes a cobalt tungsten phosphorous material. In some implementations, the first metal redistribution layer is a copper layer. In some implementations, the semiconductor device further includes a first underbump metallization (UBM) layer and a second underbump metallization (UBM) layer.

Stacked redistribution layers on die

Techniques for dynamically selecting circuit elements to combat mismatches are described. In one design, an apparatus includes first, second, and third circuits. The first circuit receives input data and provides first signals that are asserted based on the input data, e.g., with thermometer decoding. The second circuit receives the first signals and provides second signals used to select circuit elements, e.g., current sources, capacitors, resistors, etc. The third circuit generates a control for the second circuit, and the second circuit maps the first signals to the second signals based on this control. In one design, the second circuit includes a set of multiplexers and a control circuit. The multiplexers provides the first signals, circularly rotated by an amount determined by the control, as the second signals. The control circuit accumulates control data (e.g., the input data, pseudo-random data, or a fixed value) with the current control value to obtain new control value.

Circuit and method for dynamically selecting circuit elements

According to at least one embodiment of the invention, an apparatus may include first, second and third circuits. The first circuit receives input data and provides a plurality of first signals asserted based on the input data. The second circuit receives the plurality of first signals and provides a plurality of second signals used to select a plurality of circuit elements. The third circuit generates a control for the second circuit using a fractional data weight of the input data, the second circuit mapping the plurality of first signals to the plurality of second signals based on the control from the third circuit.

Apparatus and method for dynamic circuit element selection in an digital-to-analog converter

The clock signal generator of the present invention divides a higher frequency clock down to a frequency that is an uneven sub-multiple of the higher frequency. The input clock to be divided down clocks an 11-bit counter (105-110) that outputs an overflow signal to a D flip-flop (125). The D flip-flop generates a load signal that resets the counter after 1025 clock periods. The load signal also suppresses, after 1025 clock periods, the toggling of another toggle flip-flop (120) that provides a divide by two clock. By suppressing a clock pulse in the divide by two clock, every 1025 clock pulses of the higher frequency clock, the average clock frequency of the divide by two clock is reduced to an uneven sub-multiple of the higher clock frequency.

Clock signal generation

Growing community of inventors

La Mesa, CA, United States of America

Gene Hyde McAllister