Oak Technology, Inc.

International Business Machines Corporation

Samsung Electronics Co., Ltd.

Zoran Corporation

Gene H Sonu

Robert Allen Hutchins

Sushama M Paranjape

Richard C Schneider

Stanley Radzewicz

An apparatus and method for look-ahead data detection are provided, the apparatus including a boundary function generator, a boundary decision unit in signal communication with the boundary function generator, a next state generator in signal communication with the boundary decision unit, and a sample value generator in signal communication with the boundary decision unit; and the method including receiving a pickup signal sensed from an optical disc, providing a boundary function value responsive to the pickup signal, comparing the boundary function value with a programmable register value, generating decision outputs responsive to the boundary function value with combinational logic, generating a next state and detected data responsive to the decision outputs, and generating a detected sample value responsive to the decision outputs.

Look-ahead maximum-likelihood data detector for optical disk drives

A method and apparatus in an optical disk system employing a look-ahead data detection technique is described where an optimum detection is achieved with a minimum hardware complexity. In one embodiment, the boundary functions and the corresponding boundary decisions are derived for next state determination using only the minimum distance event pair for each state over the look-ahead samples, thereby reducing the detector hardware significantly relative to the Viterbi counterpart where the most likely occurring path is searched at every state. Depending on the sample quality, the limits for the boundary decisions can be programmable to combat the channel impairments like misequalzation, signal asymmetry, etc.

Method and apparatus for data detection in blue laser optical disk drives

A method and apparatus in an optical disk system employing a decision feedback equalization (DFE) technique to provide a boosted signal resolution at a data slicer input while minimizing noise. In one embodiment, an optical equalizer includes a feed forward equalizer (FFE) that equalizes the signal from the optical disk and provides an equalized signal and a feedback equalizer (FBE) that generates a feedback signal. The feedback signal is subtracted from the equalized signal to provide a signal having increased resolution and low noise, which is then applied to a data slicer. In one embodiment, the boost provided by the FFE is lower than in conventional equalizers to minimize noise. As the boost of the FFE is reduced, the number of taps in the FBE is increased to provide optimized system performance.

Data detection in optical disk drives using decision feedback equalization

A method for processing a digitized analog signal read from a DVD media and provided to a digital processing system is described herein. The method includes the steps of forming a first set of data from actual data read from a location on a DVD media, the location containing a known test data sequence, forming a second set of data comprising the known data bits making up the known test data sequence. The method proceeds with the steps of comparing the first set of data to the second set of data; and determining the magnitude of no more than two variables, the two variables representing at least three coefficients in an impulse response relationship which models the digital processing system, the magnitude of the no more than two variables being determined so that the error rate between the first and said second sets of data is minimized.

Method for processing audio and video DVD data

An apparatus for estimating values for Eight-Fourteen Modulated (EFM) data includes a peak detector and modification circuitry. The peak detector receives a first set of signals representing initial values of a sequence of EFM datums, each of which has an initial value that is a member of a first set of values including &lcub;&minus;b, &minus;a, c, a, b&rcub; where &verbar;b&verbar;>&verbar;a&verbar;>&verbar;c&verbar;. The peak detector analyzes a first subsequence of the sequence of EFM datums to determine whether a peak has occurred and, if so, asserts a modify signal. The modification circuitry responds to assertion of the modify signal by replacing the initial values of a second subsequence of the sequence EFM datums with revised values. The second subsequence of EFM datums follows the first subsequence of EFM datums and each revised value of the second subsequence has an absolute value that is a member of the first set of values.

Apparatus and method for ideal value estimation in an optical PRML read channel

A Finite Impulse Response filter (FIR) reduces the effect of baseline wandering of the input signal on convergence. The FIR includes an adder, a DC-Insensitive error calculator, a DC-Insensitive coefficient calculator, and a multiplier. The adder adds a first tap signal to a second tap signal to produce a FIR output signal. The DC-Insensitive error calculator calculates from the FIR output signal an error value that converges to zero while the FIR output signal is subject to baseline wandering. The DC-Insensitive error calculator represents the error value via an error signal. The DC-Insensitive coefficient calculator calculates a coefficient value based upon the error signal and an input signal. The DC-Insensitive coefficient calculator forces the coefficient value to converge to a steady state value while the input signal is subject to baseline wandering. The coefficient value is represented by a coefficient signal. The multiplier multiplies the first input signal by the coefficient signal to produce the first tap signal.

Apparatus and method for a DC-Insensitive FIR filter for optical PRML channel

The apparatus corrects a data detection error caused by baseline wandering in an optical PRML read channel. The apparatus includes error detection circuitry and error correction circuitry. The error detection circuitry monitors a serial output signal from the optical PRML read channel and a first set of input signals to the optical PRML read channel to detect an error event associated with baseline wandering. The error detection circuitry deems the error event to have occurred when three conditions are satisfied. First, a bit sequence represented by the serial output signal matches a first bit sequence associated with the error event. Second, a first difference in a first set of consecutive values represented by the first set of input signals is within a first range of values associated with the error event. Third, a second difference in a second set of consecutive values of the first input signal is within a second range of values associated with the error event. The error detection circuitry responds to satisfaction of all three conditions by asserting an error signal. The error correction circuitry responds to assertion of the error signal by modifying a pair of consecutive bits represented by the serial output signal to generate a corrected output signal having a second bit sequence.

Dominant error correction circuitry for a Viterbi detector

A maximum likelihood detector and a method for maximum likelihood detection of digital samples of channel output of data recorded as analog signals representing a finite number of states. The method comprises, first, programming at least two numerical metric coefficients. The coefficients are respectively applied to each sequential digital sample to generate alternative metrics, and each respective alternative metric is compared to a previous metric based on a previous digital sample. Based on the comparison, one of a plurality of provided metrics is selected which minimizes the mean squared error with respect to the previous metric. Then, the one of the finite number of states represented by the selected metric is identified, and a maximum likelihood path memory is set to a maximum likelihood state dictated by the identified one of the finite states, thereby detecting the recorded analog signals.

Maximum likelihood detection with programmed coefficients

An apparatus for processing a digitized analog signal read from a DVD media and provided to a digital processing system is described herein. The apparatus includes a DVD reading apparatus for providing a signal comprised of a stream of actual data read from a DVD media; and a processor for determining, based upon the comparison of actual data to the known ideal contents of the data on said DVD media, the magnitude of no more than two variables representing at least three coefficients in an impulse response equation which models the digital processing system. The magnitude of the two variables are determined by the processor so that the error rate between the first and second sets of data is minimized.

Apparatus for processing audio and video DVD data

Apparatus and method for detecting zero-crossings and correcting asymmetry of an RF signal. The RF signal is first converted into a digital signal having a plurality of samples. Zero-crossings detection is achieved by calculating the differences between neighboring samples, and by determining whether the differences exceed a pre-determined threshold value. Zero-crossings are also detected by comparing the differences to a pre-determined negative threshold value when the differences are negative. If a zero-crossing sample, a sum of the data values of the neighboring samples is used to generate an asymmetry offset value.

Apparatus and method for asymmetry control

A maximum likelihood detector and a method for maximum likelihood detection of digital samples of channel output of data recorded as analog signals representing a finite number of states. The method comprises, first, providing at least two numerical metric coefficients. The coefficients are derived from the difference between metrics directly associating &ldquo;0&rdquo; and &ldquo;1&rdquo; states of the recorded signal. The coefficients are respectively applied to each sequential digital sample to generate alternative metrics, and each respective alternative metric is compared to a previous difference metric based on a previous digital sample. Based on the comparison, one of a plurality of provided metrics is selected which minimizes the mean squared error with respect to the previous metric. Then, the one of the finite number of states represented by the selected metric is identified, and a maximum likelihood path memory is set to a maximum likelihood state dictated by the identified one of the finite states, thereby detecting the recorded analog signals. The numerical coefficients may be programmed based on different removable media and the probability that the samples comprise a data sequence.

Maximum likelihood detection with difference metrics and programmed coefficients

AGC Circuitry for an optical PRML read channel that is insensitive to low frequency disturbances of an RF input signal. The AGC Circuitry includes a VGA amplifier, a low pass filter, an ADC, a baseline Wander Correction Circuit, a digital gain control circuit, and a DAC. The VGA amplifier amplifies the RF input signal to produce a second RF signal. The low pass filter filters the second RF signal to produce a first analog signal. The ADC converts the first analog signal into a digital AGC output signal suitable for decoding. The baseline Wander Correction Circuit removes from the digital AGC output signal effects of low frequency disturbance of the RF input signal to produce a second digital signal. The digital gain control circuit controls the gain of the VGA amplifier by producing a digital gain control signal in response to the second digital signal. The DAC for converting the digital gain control signal into the analog gain control signal to be applied to the VGA amplifier, the analog gain control signal being substantially free from effects of low frequency disturbance of the RF input signal.

DC insensitive AGC circuit for optical PRML read channel

A clock generator for a PRML read channel for producing a clock signal with minimal jitter from an input signal subject to baseline wandering. The clock generator including a VGA amplifier, a low pass filter, an ADC, a baseline wander correction circuit, a timing offset detector and loop filter circuit, a DAC and a VCO. The VGA amplifier amplifies the input signal to produce a first analog signal. The low-pass filter filters the first analog signal to produce a second analog signal. The ADC converts the second analog signal into a first digital signal, operating synchronously with the clock signal. The baseline wander correction circuit reduces jitter in the clock signal caused by baseline wandering of the input signal. The baseline wander correction circuit produces a second digital signal from the first digital signal, operating synchronously with the clock signal. The second digital signal experiences substantially less baseline wandering than the first digital signal. The timing offset detector and loop filter circuit generates from the second digital signal a timing adjust signal representative of an adjustment to the clock signal. The timing offset detector also operating synchronously with the clock signal. The DAC converts the timing adjust signal into a third analog signal, operating synchronously with the clock signal. The VCO generates the clock signal in response to the third analog signal.

DC insensitive clock generator for optical PRML read channel

An automatic amplitude equalizer for magnetic recording channels which utilizes a readback training sequence, monitors the total power lost during the training sequence due to channel variations, and automatically adjusts the channel signal in response to the power loss factor.

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Tucson, AZ, United States of America

Gene H Sonu