Davin Computer Corporation

David Computer Corporation

Gei-Jon Pao

Angus McLagan

Chong S Un

John J Pearce

David H Methvin

A register architecture for a computer in which a plurality of banks of general purpose registers are used in the register files. Each of the multiple register banks is dedicated to a different user, with one of the register banks being dedicated to servicing interrupts and another of the register banks being dedicated to the operating system of the computer in which the register architecture is incorporated. Associated with each of the register banks is a smaller register bank of status registers in which information concerning the status of the computer is stored.

Multiple sliding register stacks in a computer

A data communications system for a computer for transferring data between the memory of the computer and one or more peripheral devices without requiring an interrupt context switch. The data communications system includes a number of specialized registers in the central processing unit of a computer, a computer memory, a data storage location associated with one or more peripheral devices, and a bus connecting the data storage location to the memory. The specialized registers in the central processing unit are dedicated exclusively to processing data transfers between the memory and the data storage location associated with the peripheral devices. Data transfers between the computer memory and the data storage location associated with the peripheral devices are made under the control of the central processing unit with the use of the special registers without the execution of an interrupt context switch.

Automatic data channels for a computer system

A processor is disclosed for use in a computer system for comparing a number of bytes simultaneously in order to locate a control character in a string of data. The processor includes a register for holding the data bytes, a register for storing the control characters, a comparison circuit for simultaneously comparing the bytes of the first register with the bytes of the second register, and a circuit for generating indicator bits when a match has been found between the two registers. Microcode instructions cause the system to branch to a predetermined memory location when the control character has been located and to branch to a second predetermined memory location when no control character is found in the data string. In another aspect, a parallel string processor for a minicomputer for searching portions of text or binary bit strings for the presence of desired words or bit strings. The processor includes a first register in which a keyword string is stored and a pair of interconnected shift registers in which the string to be searched for the presence of the keyword is stored. An arithmetic logic unit compares the contents of the first register with one of the shift registers to determine whether the keyword is present in the portion of the string being searched. After each such comparison, the contents of the interconnected shift registers are shifted with respect to the keyword stored in the first register. When the processor is searching for the presence of a keyword having a predetermined number of bytes, the contents of the shift registers are shifted one bytes at a time, and when the processor is searching for the presence of a keyword having a predetermined number of bits, the contents of the shift registers are shifted one bit at a time.

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Garden Grove, CA, United States of America

Gei-Jon Pao