Applied Materials, Inc.

Geetika Bajaj

Prerna Sonthalia Goradia

Robert Jan Visser

Jennifer Y Sun

Ankur Kadam

Darshan Thakare

Yogita Pareek

Gayatri Natu

Nitin K Ingle

David Fenwick

Rajkumar Thanu

Jeff Hudgens

Karuppasamy Muthukamatchy

Arun Dhayalan

Sanni Seppaelae

XiaoMing He

Dmitry Lubomirsky

Srinivas Gandikota

Zihui Li

Xiaowei Wu

Yixing Lin

Kevin A Papke

Tapash Chakraborty

Laksheswar Kalita

Nitin Deepak

Bipin Thakur

Srinivas D Nemani

Abhijit Basu Mallick

Mehul B Naik

Deenesh Padhi

Seshadri Ganguli

Pramit Manna

He Ren

Yixiong Yang

Fei C Wang

Jacqueline S Wrench

Bhaskar Kumar

Amit Chatterjee

Kaushik Vaidya

Ravindra Patil

Suresh Chand Seth

Atul Bhaskar Chaudhari

Suraj Rengarajan

Jennifer Sun

Described herein are articles, systems and methods where a halogen resistant coating is deposited onto a surface of a chamber component using an atomic layer deposition (ALD) process. The halogen resistant coating has an optional amorphous seed layer and a transition metal-containing layer. The halogen resistant coating uniformly covers features of the chamber component, such as those having an aspect ratio of about 3:1 to about 300:1.

Halogen resistant coatings and methods of making and using thereof

A processing method comprises positioning a substrate in a processing chamber and setting a temperature of the substrate to a range of 50° C. to 500° C.; conducting an atomic layer deposition (ALD) cycle on the substrate; and repeating the ALD cycle to form a silicon oxide film. The ALD cycle comprises: exposing the substrate to an aminosilane precursor in the processing chamber by pulsing a flow of the aminosilane precursor; purging the processing chamber of the aminosilane precursor; exposing the substrate to an oxidizing agent by pulsing a flow of the oxidizing agent for a duration in a range of greater than or equal to 100 milliseconds to less than or equal to 3 seconds; and purging the processing chamber of the oxidizing agent.

Deposition of silicon-based dielectric films

The enclosed disclosure relates to a method and apparatus for depositing functionalized nanoparticles within a semiconductor structure in order to create a nano-layer capable of enhancing imaging and contrast, The semiconductor structure can include any type of VNAND structure or 3D structure, The nanoparticles are formed in high-aspect ratio trenches of the structure and form a nano-layer. The functionalized nanoparticles comprise synthesized nanoparticles as well as organic molecules. The organic molecules are chosen to selectively bind to certain nanoparticles and surface materials.

Method of enhancing contrast while imaging high aspect ratio structures in electron microscopy

Disclosed in some embodiments is a chamber component (such as an end effector body) coated with an ultrathin electrically-dissipative material to provide a dissipative path from the coating to the ground. The coating may be deposited via a chemical precursor deposition to provide a uniform, conformal, and porosity free coating in a cost effective manner. In an embodiment wherein the chamber component comprises an end effector body, the end effector body may further comprise replaceable contact pads for supporting a substrate and the contact surface of the contact pads head may also be coated with an electrically-dissipative material.

Ultrathin conformal coatings for electrostatic dissipation in semiconductor process tools

Embodiments of the disclosure provide methods for fabricating or otherwise forming a protective coating containing cerium oxide on processing chamber surfaces and/or components, such as surfaces which are exposed to a plasma within a processing chamber. In one or more embodiments, a method of forming a protective coating within a processing chamber includes depositing a cerium oxide layer on a chamber surface or a chamber component during an atomic layer deposition (ALD) process. The ALD process includes sequentially exposing the chamber surface or the chamber component to a cerium precursor, a purge gas, an oxidizing agent, and the purge gas during an ALD cycle, and repeating the ALD cycle to deposit the cerium oxide layer.

Methods for forming a protective coating on processing chamber surfaces or components

A method of forming a fluorinated metal film is provided. The method includes positioning an object in an atomic layer deposition (ALD) chamber having a processing region, depositing a metal-oxide containing layer on an object using an atomic layer deposition (ALD) process, depositing a metal-fluorine layer on the metal-oxide containing layer using an activated fluorination process, and repeating the depositing the metal-oxide containing layer and the depositing the metal-oxide containing layer until a fluorinated metal film with a predetermined film thickness is formed. The activated fluorination process includes introducing a first flow of a fluorine precursor (FP) to the processing region. The FP includes at least one organofluorine reagent or at least one fluorinated gas.

Method of forming a fluorinated metal film

Methods of depositing a metal film by exposing a substrate surface to a halide precursor and an organosilane reactant are described. The halide precursor comprises a compound of general formula (I): MQR, wherein M is a metal, Q is a halogen selected from Cl, Br, F or I, z is from 1 to 6, R is selected from alkyl, CO, and cyclopentadienyl, and m is from 0 to 6. The aluminum reactant comprises a compound of general formula (II) or general formula (III): wherein R, R, R, R, R, R, R, R, R, R, R, R, R, and Rare independently selected from hydrogen (H), substituted alkyl or unsubstituted alkyl; and X, Y, X', and Y&#x2032; are independently selected from nitrogen (N) and carbon (C).

Methods for forming impurity free metal alloy films

Exemplary methods for selective etching of semiconductor materials may include flowing a fluorine-containing precursor into a processing region of a semiconductor processing chamber. The methods may also include flowing a silicon-containing suppressant into the processing region of the semiconductor processing chamber. The methods may further include contacting a substrate with the fluorine-containing precursor and the silicon-containing suppressant. The substrate may include an exposed region of silicon nitride and an exposed region of silicon oxide. The methods may also include selectively etching the exposed region of silicon nitride to the exposed region of silicon oxide.

Selective nitride removal

Systems and methods of etching a semiconductor substrate may include flowing an oxygen-containing precursor into a substrate processing region of a semiconductor processing chamber. The substrate processing region may house the semiconductor substrate, and the semiconductor substrate may include an exposed metal-containing material. The methods may include flowing ammonia into the substrate processing region at a temperature above about 200&#xb0; C. The methods may further include removing an amount of the metal-containing material.

Gas-phase selective etching systems and methods

Precursors, such as interhalogens and/or compounds formed of noble gases and halogens, may be supplied in a gaseous form to a semiconductor processing chamber at a predetermined amount, flow rate, pressure, and/or temperature in a cyclic manner such that atomic layer etching of select semiconductor materials may be achieved in each cycle. In the etching process, the element of the precursor that has a relatively higher electronegativity may react with select semiconductor materials to form volatile etching byproducts. The element of the precursor that has a relatively lower electronegativity may form a gas that may be recycled to re-form an precursor with one or more halogen-containing materials using a plasma process.

Selective atomic layer etching of semiconductor materials

The present disclosure generally relates to methods of electro-chemically forming yttria or yttrium oxide. The methods may include the optional preparation of a an electrochemical bath, the electrodepositon of yttria or yttrium oxide onto a substrate, removal of solvent form the surface of the substrate, and post treatment of the substrate having the electrodeposited yttria or yttrium oxide thereon.

Method for forming yttrium oxide on semiconductor processing equipment

The present disclosure generally relates to methods of electro-chemically forming aluminum or aluminum oxide. The methods may include the optional preparation of a an electrochemical bath, the electrodepositon of aluminum or aluminum oxide onto a substrate, removal of solvent form the surface of the substrate, and post treatment of the substrate having the electrodeposited aluminum or aluminum oxide thereon.

Aluminum electroplating and oxide formation as barrier layer for aluminum semiconductor process equipment

Growing community of inventors

New Delhi, India

Geetika Bajaj