Nexperia B.v.

Geethanadh Asam

Katarzyna Nowak

Walter Luis Tercariol

Harrie Horstink

Maikel Pieter Sturkenboom

Robert Mossel

The present disclosure relates to a bi-directional bus repeater. The present disclosure further relates to a communication bus including a bi-directional bus repeater, and to a communication system including the communication bus. The bi-directional bus repeater includes a first input terminal, a second input terminal, a first pulldown element connected to the first input terminal, and a second pulldown element connected to the second input terminal. By ensuring that the activation of the first and second pulldown elements is dependent on the state of the corresponding input terminal and the detection of a high-to-low transition of the corresponding other input terminal, the problem of self-locking can be avoided or at least minimized.

Bi-directional bus repeater

A repeater for open-drain bus communication and a system including the same is provided. The bus repeater includes an A-to-B buffer to receive the signal at the A-side terminal and to produce a first buffered signal, a B-side pull-down control unit to produce a first control signal based on the received first buffered signal, and a B-side pull-down element to pull down the voltage at the B-side terminal based on the first control signal. The B-side pull-down element includes a B-side pull-down transistor that is arranged in between the B-side terminal and a B-side ground reference terminal. The first control signal controls a voltage at the control terminal of the B-side pull-down transistor. The B-side pull-down control unit includes a B-side comparing unit to compare the voltage at the B-side terminal to a first reference voltage, and to generate the first control signal based on a result of the comparison.

Open-drain bus repeater and system comprising the same

A repeater for open-drain bus communication and a system including the same is provided. The repeater includes at least one repeating unit having an A-side terminal connected to an A-side open-drain bus, and a B-side terminal electrically connected to a B-side open-drain bus. The repeater has a first mode to receive a signal at the A-side and to produce a signal at the B-side. The repeating unit includes a B-side accelerator element connected to the B-side terminal. The repeating unit when in a first mode includes a first control unit to, control the B-side accelerator element to pull up a voltage at the B-side when the voltage at the A-side surpasses a first threshold voltage during a rising edge of the voltage, and to subsequently control the B-side accelerator element to stop pulling up the voltage at the B-side when the voltage at the B-side surpasses a second threshold voltage.

This disclosure relates to a dual power supply detection circuit including first and second input stage field effect transistors, an inverter stage, a feedback stage field effect transistor, and first and second compensation circuits. The inverter stage includes a complimentary pair of transistors, and the complementary pair of transistors includes an NMOS transistor and a PMOS transistor configured and arranged so that gate lengths of the PMOS and NMOS transistors are different. The disclosure also relates to an integrated circuit including a dual power supply detection circuit.

Dual power supply detection circuit

A Schmitt trigger voltage comparator circuit is provided including a voltage reference input, a current source having a first voltage controlled current source connected to the voltage reference input and a second voltage controlled current source connected to a signal input for converting the signal input to a input current and the voltage reference input to a reference current, a current mirror having an input connected to the output of the first voltage controlled current source configured and arranged to invert the direction of the first current and an output of the current mirror connected to the output of the second voltage controlled current source, and a sequence controller for generating digital signals to control a first plurality of switches and a second plurality of switches. The first plurality of switches control the first and second voltage controlled current sources and the second plurality of switches control the current mirror.

Schmitt trigger voltage comparator

This disclosure relates to a power supply detection circuit, including: a first input stage field effect transistor; an inverter stage; and a feedback stage field effect transistor. The inverter stage includes a complimentary pair of transistors that includes an NMOS transistor and a PMOS transistor configured and arranged such that gate lengths of the PMOS and NMOS transistors are different. The disclosure also relates to an integrated circuit including a power supply detection circuit.

Power supply detection circuit

This disclosure relates to a filter circuit for an output stage of an electronic circuit. The filter circuit includes a capacitor connected between a supply voltage and a first transistor. The first transistor is arranged as a diode connected transistor; a second transistor is connected to the first transistor so that the first and second transistors are arranged as a current mirror. The capacitor is connected to the first and second transistors and configured and arranged so that during operation the first transistor, the second transistor and the capacitor operate as a high pass filter.

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Nijmegen, Netherlands

Geethanadh Asam