International Business Machines Corporation

Gary S Koch

Robert E Busch

Kevin A Batson

Reid A Wistort

Fred John Towler

Geordie M Braceras

Steven Lee Gregor

R Dean Adams

Thomas J Eckenrode

A built-in self test system () and method for two-dimensional memory redundancy allocation. The built-in self test system is adapted to allocate two redundant columns () and one redundant row () to an embedded memory () as needed to repair single cell failures (SCFs) within the rows () and columns of the memory. The self-test system includes a left-priority encoder (), a right-priority encoder (), and a greater-than-two detector (). The left-priority encoder encodes the location of the first SCF most proximate the most-significant bit of the corresponding word. The right-priority encoder encodes the location of the first SCF most proximate the least-significant bit of the corresponding word. The greater-than-two detector determines whether a word contains more than two SCFs. If the greater-than-two detector detects that a word contains more than two SCFs, the built-in self test system identifies the corresponding row as being a must-fix row, since the number of SCFs exceeds the number of redundant columns.

Built-in self test system and method for two-dimensional memory redundancy allocation

The present invention provides a memory architecture that allows memory checking and replacement of defective words by spare elements already provided on the chip that do not increase the chip size. The method of the invention uses a separate redundant array architecture to provide address translation, so that the redundant entries are represented as the correct entry index that they are replacing.

Redundant array architecture for word replacement in CAM

A high-reliability content & addressable memory using a shadow content-addressable memory (CAM) array in parallel with a primary CAM array to increase the reliability of CAM searches. The reliability of CAM searches has been less than desired because of random environmental influences that corrupt data. The shadow CAM is written, read, and searched in parallel with the primary CAM. The search results from the parallel searches are compared and, if identical, are declared valid. If the search results are not equal, corrective action is initiated. The high-reliability content-addressable memory may be used with or without priority encoders.

High reliability content-addressable memory using shadow content-addressable memory

A high-reliability content-addressable memory using a shadow content-addressable memory (CAM) array in parallel with a primary CAM array to increase the reliability of CAM searches. The reliability of CAM searches has been less than desired because of random environmental influences that corrupt data. The shadow CAM is written, read, and searched in parallel with the primary CAM. The search results from the parallel searches are compared and, if identical, are declared valid. If the search results are not equal, corrective action is initiated. The high-reliability content-addressable memory may be used with or without priority encoders.

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Jeffersonville, VT, United States of America

Gary S Koch