Lucent Technologies Inc.

At+t Corp.

Agere Systems Guardian Corp.

Gary Robert Weber

Lalita Manchanda

Anthony E Novembre

James Alexander Liddle

John Michael Hergenrother

Donald Paul Monroe

Edward Paul Martin, Jr

Young O Kim

Anthony Edward Novembre

Embodiments of the invention include a sensor such as a capacitive sensor with improved scratch resistance. The sensor has a substrate and a layer of sensing elements formed thereon that are formed from materials having a greater mechanical firmness than conventional aluminum or other soft metal materials. Sensor interconnects also are made of such materials. The increased mechanical firmness of the sensing elements and interconnects improves the scratch and mechanical resistance thereof by reducing scratches, mechanical stress and cracks by reducing the deformation and consequently the bridge and/or gap effects of the sensing element material. Such effects plague conventional electronic devices, integrated circuits and sensors. Alternatively, the inventive sensor includes, e.g., a dielectric region operably coupled to the sensing elements and interconnects, thus forming a capacitive sensor or other electronic devices. The sensing elements and interconnects are formed beneath, within or on top of the dielectric region, and their improved mechanical firmness improves the scratch and mechanical resistance of the dielectric region or other material region formed thereon.

Electronic apparatus having improved scratch and mechanical resistance

A process for fabricating a vertical MOSFET device for use in integrated circuits is disclosed. In the process, at least three layers of material are formed sequentially on a semiconductor substrate. The three layers are arranged such that the second layer is interposed between the first and third layers. The second layer is sacrificial, that is, the layer is completely removed during subsequent processing. The thickness of the second layer defines the physical gate length of the vertical MOSFET. In the process the first and third layers have etch rates that are significantly lower than the etch rate of the second layer in an etchant selected to remove the second layer. The top layer, which is either the third or subsequent layer, is a stop layer for a subsequently performed mechanical polishing step that is used to remove materials formed over the at least three layers. After the at least three layers of material are formed on the substrate, a window or trench is formed in the layers. The window terminates at the surface of the silicon substrate in which one of either a source or drain region is formed in the silicon substrate. The window or trench is then filled with a semiconductor material. This semiconductor plug becomes the vertical channel of the transistor. Therefore the crystalline semiconductor plug is doped to form a source extension, a drain extension, and a channel region in the plug. Subsequent processing forms the other of a source or drain on top of the vertical channel and removes the sacrificial second material layer. The removal of the sacrificial second layer exposes a portion of the doped semiconductor plug. The device gate dielectric is then formed on the exposed portion of the doped semiconductor plug. The gate electrode is then deposited. The physical gate length of the resulting device corresponds to the deposited thickness of the second material layer.

Process for fabricating vertical transistors

An improved, scattering-type mask for use in a charged-particle beam lithography process comprises the mask having a membrane portion and a scattering portion, the membrane portion being fabricated with a conductive material or a plurality of materials in which one of them is conductive. The conductive nature of the membrane portion mitigates the accumulation of charge in the mask, thereby enhancing the definition of the charged-particle pattern transferred from the mask onto the wafer under fabrication and reducing the distortion obtained with the system.

Membrane mask for projection lithography

A method for making gate dielectrics for MOS devices includes first forming a silicon oxynitride layer, and then forming a silicon dioxide layer that underlies the oxynitride layer. The oxynitride layer functions as a membrane for controlled diffusion of oxygen to the oxidation region of the silicon substrate.

Oxynitride-dioxide composite gate dielectric process for MOS manufacture

Growing community of inventors

Whitehouse Station, NJ, United States of America

Gary Robert Weber