Artesyn Embedded Computing, Inc.

Gary Perkins

Martin Peter John Cornes

Malcolm J Rush

Andrew Porter

Rajesh Mangal

A fault-tolerant failsafe computer voting system including a first voting module that generates a first key based on a comparison between a first data packet and a copy of a second data packet. The first voting module determines whether the first key and a second key are valid keys. The second data packet is a copy of the first data packet. A second voting module generates the second key based on a comparison between the second data packet and a copy of the first data packet. A processing module generates an outgoing data packet based on the first data packet in response to determining whether the first key and the second key are valid keys. The first voting module is inhibited from generating the second key and the second voting module is inhibited from generating the first key.

FPGA mismatched packet stop for a safety system

A system includes a first fail-safe chassis (FSC) receives module health signals from a plurality of modules and generates a first chassis health signal. The chassis health signal includes first and second portions. A plurality of modules receives the chassis health signal. The FSC determines whether one or more of the module heals signals indicates an associated module is unhealthy by comparing the module health signals and a predetermined health value. The FSC selectively de-asserts the first chassis health signal based on the comparison. A second FSC operates similarly. A safety relay box determines the health of the system in accordance with the first and second chassis health signals.

End to end FPGA diagnostics for a safety system

A system includes a safety relevant component that generates a data packet in response to receiving a request to perform a task and that communicates the data packet. The system further includes a first fail-safe chassis (FSC) that continuously generates a first and second chassis health signals, that determines whether the data packet is valid, and that selectively determines whether to de-assert the first and second chassis health signals based on the determination. The system also includes a second FSC that continuously generates a third a fourth chassis health signals, that determines whether a data packet is valid, and that selectively determines whether to de-assert the third and fourth chassis health signals based on the determination. The system includes a direct connect algorithm state machine that determines whether to instruct the one of the first and second FSCs to operate in a predetermined mode based on the chassis health signals.

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Clay Springs, AZ, United States of America

Gary Perkins