Cadence Design Systems, Inc.

Gary Matsunami

Karun Sharma

Yinnie Lee

Jeffrey Scott Salowe

Satish Raj

Olivier Pribetich

Sandipan Ghosh

Joshua Alexander Baudhuin

Sabra Rossman

Steven Riley

Embodiments according to the present disclosure relate to physically implementing an integrated circuit design while conforming to the requirements of complex color based track systems, and using information about instances that have been included in the design. In particular, the present embodiments allow for the automatic creation of WSPs by examining heights and placement orientations of instances, along with the width, spacing, and colors of instance pins and blockages. In these and other embodiments, techniques are provided for filling gaps between generated tracks, as well as for generating tracks to account for the possibility of flipped or mirrored instances.

Generating width spacing patterns for multiple patterning processes using instances

Embodiments according to the present disclosure relate to physically implementing an integrated circuit design while conforming to the requirements of complex color based track systems. In embodiments, the color based track systems can include irregularly spaced and non-uniform width colored tracks. These and other embodiments include a methodology to automatically generate a track pattern for an integrated circuit design that satisfies both design constraints and user inputs. Various alternatives for identifying starting points in the design for automatically generating track patterns are possible.

Generating a colored track pattern of non-uniform width from a sparse set of tracks

One aspect checks and prepares design data () based on design rule(s) to identify tracks for physical implementation of an electronic design. Structured physical implementation () is performed to implement at least a part of the electronic design by using the tracks under separate design rule(s). Structured physical implementation using the tracks under separate design rules result in correct-by-construction implementation results automatically satisfying the design rule(s), without performing additional design rule checking on the design rule(s). Additional physical implementation () may be optionally performed for portion(s) of the electronic design not implemented with the structured physical implementation. Layout fixing or optimization may be optionally performed to fix design rule violations in the additional physical implementation results, if any, or to optimize the additional physical implementation results.

Methods, systems, and articles of manufacture for implementing electronic designs using constraint driven techniques

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Cupertino, CA, United States of America

Gary Matsunami