International Business Machines Corporation

Gary Markovits

Harold D Edmonds

Eric W Hearn

Murlidhar V Kulkarni

Brian J Elliott

Patrick W Chye

Vincent J Lyons

Method for reducing oxygen precipitation in silicon wafers

A multi-layer metallized substrate comprises a matrix of sintered silicon particles joined by a thin insulating layer of silicon dioxide or silicon nitride. Semiconductor circuit chips are bonded to the surface of the substrate to form an electrically connected, unitary integrated circuit module structure.

Multi-layered metallized silicon matrix substrate

A method or technique is disclosed for predicting precisely where oxygen precipitation will occur in semiconductor wafers that are being processed in connection with integrated circuit manufacture; the technique is based upon the discovery that such precipitation will occur at resistivity peaks measured prior to any thermal treatment of the wafers. In other words, the technique permits characterizing the wafers by the diametral resistivity profile that is obtained in the initial resistivity measurements, whereby a change in oxygen precipitation can be predicted precisely where compensated intrinsic regions have been measured in the initial measurements.

Technique for predicting oxygen precipitation in semiconductor wafers

Compound semiconductor bodies are formed by bonding a layer of supporting material to the two opposite faces of a semiconductor wafer and then cutting the semiconductor wafer into two parts in a plane parallel to said faces. The cut surface of each part is then polished.

Process for forming compound semiconductor bodies

Gettered semiconductor wafers for integrated circuit device manufacture are prepared by grinding a layer of damage into the back face of the wafer to a depth of about 8-35 microns, heating the wafer to a temperature of about 800.degree.-1150.degree. C. for about 1 to 3 hours and quickly cooling the wafer to a temperature below about 600.degree. C., and polishing both sides of the wafer to form a polished, substantially damage-free front face and a smooth back face which has a residual layer of crystallographic damage to provide additional gettering during device manufacture.

High performance silicon wafer and fabrication process

A non-destructive method of mapping damage sites in the surface of a semiconductor article, such as a silicon wafer, establishes an interface between the semiconductor and a dilute acid electrolyte. The semiconductor article is negatively biased with respect to the electrolyte and the semiconductor surface is evenly illuminated. The biasing voltage and the illumination intensity are chosen such that small hydrogen bubbles, which stick to the surface of the semiconductor article, are produced at the damage sites. The locations of the bubbles are detected and recorded.

Growing community of inventors

Poughkeepsie, NY, United States of America

Gary Markovits