Catalyst Semiconductor, Inc.

Burr-brown Corporation

Gary L Miller

Frederick J Highton

Robert L White

Christopher H Patterson

Kazuo Ito

Jeffrey A Berkman

Power stealing circuit receives data signals on its signal input terminal and diverts some power from the signal input terminal to its power output terminal to power another circuit. When the voltage on the signal input terminal exceeds the voltage on the power output terminal, positive supply power is 'stolen' from the signal input terminal to the power output terminal. When the signal input terminal is below the power output terminal, the two terminals are disconnected. A similar circuit 'steals' negative supply power. In some embodiments, a comparator compares the voltages on the two terminals and regulates the power stealing operation.

Power stealing circuit

Disclosed is a rectifier circuit which utilizes field effect transistors, and which includes current sensing resistors to adjust the drive to the field effect transistors to avoid forward biasing the intrinsic bipolar transistor in the field effect transistors to thereby avoid injecting current into the substrate where the field effect transistors are formed on a common substrate. In addition, the current sensing resistors provide a fast startup, which is achieved both in the case where the field effect transistors are formed on a common substrate as well as those implementations where the field effect transistors do not share a common substrate. Current limiting resistors are also included to prevent overloading the field effect transistors and injecting current into the substrate when the field effect transistors share a common substrate.

CMOS rectifier circuit

A CMOS digital-to-analog converter includes a modified R-2R resistive ladder network connected to 16 pairs of bit switches responsive to the various digital inputs to produce an internal analog voltage representative of the digital input. Each pair of bit switches includes an N-channel MOSFET and a P-channel MOSFET. The on resistance of the P-channel MOSFET is adjusted to precisely match that of the N-channel MOSFET by driving the gate of each P-channel MOSFET with the output of a CMOS inverter referenced between V.sub.CC and a reference voltage that is adjusted to cause the on resistances of a P-channel 'monitor' MOSFET and an N-channel 'monitor' MOSFET to be equal. A reference voltage is generated by a circuit that generates a temperature-invariant source current from a V.sub.BE difference between first and second transistors, causes part of it to flow through first, second, and third resistors, the third resistor having a voltage across it established by the V.sub.BE voltage of a transistor and having a predetermined negative temperature coefficient, the second and third resistors being composed of nichrome, the first resistor being lightly doped P-type material the resistance of which has a positive temperature coefficient.

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Santa Clara, CA, United States of America

Gary L Miller