Other

Unisys Corporation

Gary L Engel

John M Quernemoen

Daniel J Kluth

Bruce C Todd

Paul J Georgeson

Douglas R Mueller

A selective, non-manual power controller provides the selective, non-manual power control of various components of a data processing equipment from and reports the power status of such components to a central location. As opposed to pass power controllers which were limited to powering on or off all of the computer equipment controlled by a given controlling element, this invention provides a non-manual capability for remotely powering on or off any one or more components of a system or systems in a selective manner and providing the power status thereof. By being able to selectively activate or deactivate any or all of the components of a data processing system, the ability to conserve electrical energy is optimized. In many cases, a single component or a set of components are not used for extended periods of time, such as an entire production period or at least a large portion of a production period. For example, a peripheral subsystem or a particular peripheral device may be used solely for a certain type of job which is active for only a portion of a production period. Alternatively, a multiprocessor system may run as a unit processor system during evenings and weekends. The net result is a substantial saving in electrical energy that may be implemented from and reported to a central location.

Automatic power control system which automatically activates and

A test system for a logic circuit in which virtual pins are coupled between logical networks and in which the virtual pins are free of any logic elements in common with the networks. A single latch control line, independent of the system clock of the networks, by applying three different control signals, controls switching between a test mode and a system mode and also controls latching and storing of data from a logic network. When the latch control line switches to the system mode it maintains the system mode independently of the cycling of the system clock. Further in the system mode, the virtual pins are transparent. In the test mode a string of virtual pins form a shift register which may be used to shift a test pattern by means of separate A,B clock signals into position for testing the logic networks.

Test system providing testing sites for logic circuits

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Wyoming, MN, United States of America

Gary L Engel