Advanced Micro Devices Corporation

Globalfoundries Inc.

Gary H Simpson

Geoffrey S Strongin

Garth D Hillman

Ralf Findeisen

Andrew R Rawson

Alexander J Branover

Maurice B Steinman

Paul Blinzer

Andrew William Lueck

Walter G Fry

Francisco Leonel Duran

Ming L So

Ali Ibrahim

Krishna Sai Bernucho

Mom-Eng Ng

Dan P Shimizu

Laura M Smith

Xiaogang Zheng

A processor includes a processor core and a power management controller operable to receive a timer event, store the timer event, generate a hardware system sleep command to enter a hardware system sleep state, and restore the timer event upon exiting from the hardware system sleep state.

Method and apparatus for transitioning a system to an active disconnect state

In one embodiment, a processor comprises a programmable map and a circuit. The programmable map is configured to store data that identifies at least one instruction for which an architectural modification of an instruction set architecture implemented by the processor has been defined, wherein the processor does not implement the modification. The circuitry is configured to detect the instruction or its memory operands and cause a transition to Known Good Code (KGC), wherein the KGC is protected from unauthorized modification and is provided from an authenticated entity. The KGC comprises code that, when executed, emulates the modification. In another embodiment, an integrated circuit comprises at least one processor core; at least one other circuit; and a KGC source configured to supply KGC to the processor core for execution. The KGC comprises interface code for the other circuit whereby an application executing on the processor core interfaces to the other circuit through the KGC.

Known good code for on-chip device management

Uses of known good code for implementing processor architectural modifications

Growing community of inventors

Framingham, MA, United States of America

Gary H Simpson