Silicon Laboratories Inc.

Gary Franzosa

Alan Lee Westwick

Guillaume Crinon

Nicolas Constantinidis

Alexandre Rouxel

Marty Lynn Pflum

Didier Gallais

A single chip radio platform is disclosed for communicating with an RF channel. An RF front end is provided having a receive/transmit capability to receive an RF carrier modulated with digital data and convert the data to analog baseband data, and modulate an RF carrier with baseband data. A digital signal processor (DSP) engine is provided for interfacing with the RF front end to form in conjunction therewith the PHY layer, and interfacing with the MAC layer to demodulate the baseband data and in the transmit mode to generate the baseband data for modulation and transmission by the RF front end. A microcontroller unit (MCU) is provided for performing the functionality of the MAC, network and application layers and interfacing with the DSP. Clock circuitry is provided including a stable reference clock for generating a first fixed clock for providing MCU clocks for the operation of the MCU, and for providing a reference for a local oscillator at substantially the channel frequency for use by the RF front end and a DSP clock for use by the DSP, both the MCU clocks, the local oscillator and the DSP clock having the stability of the first fixed clock. Periodic power management circuitry is provided for controlling the operation of the radio platform to operate in a sleep.

Single chip low power fully integrated 802.15.4 radio platform

A method is disclosed for controlling the operation of a low power radio platform that realizes the physical layer (PHY) with a software portion and an analog front end, the analog front end disposed between the DSP and an antenna, and realizes the MAC layer with a microcontroller unit (MCU). The DSP, analog front end and MCU are maintained in a low power mode of operation when not in data communication. When data communication is initiated, a hardware controller controls at least one hardware interface disposed between the DSP and the analog front end to initiate multiple time based tasks to transfer data to and from a buffer. During the execution of these tasks, the controller causes a task in the DSP to be initiated for processing of data in the buffers and, upon completion of at least one of the tasks, notifying the MCU of such. The controller controls the hardware interface to terminate operation when predetermined time based events have occurred. The MCU in at least one mode of operation thereof is operable to initiate the operation of the hardware controller and then convert to a low power mode of operation to await notification.

Hardware synchronizer for 802.15.4 radio to minimize processing power consumption

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Austin, TX, United States of America

Gary Franzosa