Tandem Computers Incorporated

Other

Gary D Owens

Russell L Gillenwater

Davoud Safari

A securing device (10) for cargo (12) in a utility vehicle (13), such as a pickup truck (14), a trailer truck (16) and the like, of the type having a cargo carrying compartment (18) defined by a floor (20) and opposite side walls (22). The securing device (10) comprises a cross rail (24). An assembly (26) is for rigidly holding the cross rail (24) laterally between the side walls (22) of the cargo carrying compartment (18) in the utility vehicle (13). An assembly (28) on the cross rail (24) is for engaging the cargo (12) within the cargo carrying compartment (18), so as to retain the cargo (12) in a selected position upon the floor (20), to prevent longitudinal and lateral movement of the cargo (12).

Securing device for cargo in a utility vehicle

An application specific integrated circuit (ASIC) includes ASIC logic, test logic, dual function input test cells and dual function output test cells. The test logic with the input and output test cells provides manufacturing test capability for the ASIC logic with a plurality of input pins and a plurality of output pins while reducing both the gate count and signal time delay associated with the input and output test cells. Each input test cell includes a boundary scan circuit means and a built-in self-test circuit means. An input test cell has a signal propagation time delay for a signal, that travels from an input pin to an ASIC logic input line, equivalent to one two-to-one multiplexer signal propagation delay. Hence, while the input test cell has the capability of both built-in self-test and boundary scan testing, the dual capability is achieved without incurring a signal propagation time delay for each capability. Like the input test cells, each output test cell includes a boundary scan circuit means and a built-in self-test circuit means. The output test cell also has a signal propagation time delay for a signal, that travels from an ASIC logic output line to an output pin, equivalent to a single two-to-one multiplexer signal propagation delay.

Cell architecture for built-in self-test of application specific

An application specific integrated circuit (ASIC) includes ASIC logic and test logic that includes a fail-safe circuit and test logic circuitry. The test logic in conjunction with input and output test cells provides manufacturing test capability for the ASIC logic with a plurality of input pins and a plurality of output pins. The test logic generates several control signals that can affect operation of the ASIC logic. If any one of these signals is driven active by either a failure or a defect, the ASIC logic would be rendered inoperative. Consequently, each of these control signals is routed to the fail-safe circuit. These control signals include, for example, tri-state and reset signals and other control signals generated by test logic circuitry for the built-in testing of the ASIC. The fail-safe circuit generates a fail-safe control output signal for a corresponding control input signal from the test logic circuitry only during manufacturing testing when a fail-safe enable signal is applied to the fail-safe circuit. Preferably, the fail-safe enable signal is provided on one of the plurality of pins connected to the test logic so that the fail-safe enable signal cannot be generated by a failure or defect in the test logic circuitry.

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Austin, TX, United States of America

Gary D Owens