Unisys Corporation

Other

Gary C Whitlock

Kha Nguyen

David M Kalish

Russell Lee Marrash

Debaditya Mukherjee

Haluk Katircioglu

Richard D Freeman

John A De Beule

Keith S Saldanha

Patrick C Chan

An arbitration logic system in a system control module regulates access to a common system bus as provided by a state machine which toggles access priority between two or more resource modules while preventing deadlock contention between two requesting modules while insuring that no module will be starved or denied access even though all the resource modules are contending for bus access. Any continuous deprivation or starvation of a module for bus access is prevented, in addition to any deadlock situations which are also prevented. This occurs by allowing retrying modules to request the bus at a temporarily higher priority and limiting the number of retries that any given requesting module is permitted to have.

Arbitration system for bus requestors with deadlock prevention

Two partitioned systems are interconnected by bus exchange modules which connect to first and second system common busses. Each system common bus shares three or more requestors, and an arbitration logic unit in each partition manages bus access priority depending on certain existing conditions. Equitable access to each system bus is allocated and no one particular requestor will be locked out from bus access. Deadlock and starvation are prevented by setting one requestor module for normal top priority but also allocating secondary priority to the remaining two requestor modules by toggling and rotating priorities among these two requestor modules. Additionally, the arbitration logic allows the two requester retrying modules to request the bus at a temporarily higher priority, but limiting the number of retry cycles allowed to any given requesting module.

Dual coupled partitionable networks providing arbitration logic for

A diagnostic protocol and display system wherein the cable bus output of a computer to a printer is sensed to select coded error data out of the output stream in order to activate a visual display of coded error data for benefit of the human operator.

Diagnostic protocol and display system

An entry level data processing system is expandable, with low overhead, by a factor of two to a partitionable upgraded data processing system. This entry level system includes: 1) one system bus, 2) a central processing module (CPM), an input/output module (IOM), and a system control module (SCM)--all of which have one system bus port coupled to the system bus, 3) a memory module coupled via a memory bus to the system control module, and 4) a system expansion interface through which the entry level system is expanded to the upgraded system. In one particular preferred embodiment, the system expansion interface consists of a) a first connector on the SCM for externally connecting to and communicating with the memory bus, b) a second connector on the SCM for externally connecting to and communicating with the system bus, and c) an extension of the system bus through a switch in the SCM and a third connector on the SCM for externally connecting to and communicating with the extended system bus. To expand the entry level system to the upgraded system, a duplicate copy of the entry level data processing system as recited in 1-4 above is added along with a respective three port bus expansion module (BEM) in each copy of the entry level data processing system. This BEM, in each particular entry level system, intercouples the first and second connectors on the SCM of that same system to the third connector on the SCM of the other entry level system.

Entry level data processing system which is expandable by a factor of

A VSLI chip is implemented with registers which log permanent and intermittent errors occurring within the chip as sensed by concurrent error detection circuitry (CED). If a fatal error is detected (one which would destroy the reliability of chip operations), then the chip is immobilized into a hold mode (freeze). Interrupts are signalled to a cooperating maintenance controller which can pass the error information to an external computer for display and for locating a faulty area.

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Mission Viejo, CA, United States of America

Gary C Whitlock