Texas Instruments Corporation

Garry Ross Elder

Jinrong Qian

Yevgen P Barsoukov

Jose Antonio Vieria Formenti

Jose Antonio Vieira Formenti

Warren A Wartell

Ramanujam Thodur

Various systems and methods for determining micro-shorts are disclosed. For example, some embodiments of the present invention provide battery systems including a determination of potential micro-shorts based on rate of change of state of charge. Such battery systems include: a battery, a processor, and a computer readable medium. The computer readable medium includes instructions executable by the processor to: determine a rate of change of the state of charge of the battery; compare the rate of change of the state of charge of the battery against a threshold; and indicate a potential failure where the result of the comparison is beyond the threshold.

Systems, methods and circuits for determining micro-short

Apparatus and method to scramble data prior to placing it on a bus or in memory uses embedded hardware keys for encryption/decryption. The hardware keys may be used in addition to software encryption. Different hardware keys may be used to process most significant bits and least significant bits of a data word. Different hardware keys may be used to process messages from/to different channels. The hardware key may be comprise a series of fixed logic cells.

Hardware key encryption for data scrambling

Various systems and methods for determining potential battery failure are disclosed. For example, some embodiments of the present invention provide battery systems that include a battery, an embedded processor and a computer readable medium. The computer readable medium includes instructions executable by the embedded processor to measure at least one characteristic of the battery; to calculate a rate of change of internal impedance of the battery based at least in part on the at least one characteristic of the battery; and to determine a potential failure condition based on the rate of change of internal impedance of the battery.

Systems, methods and circuits for determining potential battery failure based on a rate of change of internal impedance

An apparatus for frustrating unwanted access to data stored with a host device includes: (a) A data disrupting unit coupled with the host device for disrupting the data in response to an action signal. (b) At least one power source unit coupled with the host device. (c) A sensor unit coupled with the host device and with the at least one power source unit. The sensor unit is configured and coupled for sensing at least one alert condition associated with the host device. The sensor unit generates an alerting signal when at least one respective alert condition of the at least on alert condition is sensed. At least one respective power source unit of the at least one power source unit responds to the alerting signal to present the action signal to the data disrupting unit.

Apparatus and method for frustrating unwanted access to data with a host device

A system interface having an interface for dual battery packs provides for power up sequencing of battery packs and pack switching under the control of a host processor within associated system electronics. The host processor communicates with each battery pack via a pack interface that includes a single wire mode control signal and a single wire status signal. The mode control signal allows the host processor to control the operational mode of selector switches within the respective battery pack. The single wire status signal provides status information to the host processor regarding the state of the selector switches within the respective battery pack. The mode and status signals are multi-state signals that permit at least three states to be identified via the single wire interface. Selector switches are provided only in the battery packs. No selector switches are included in the system electronics to minimize voltage drops between the selected battery pack and the system electronics.

Battery pack system interface with multiple mode control states

An apparatus for improving protection of a battery pack when the battery pack is in a very low power state, the battery pack including a plurality of battery cells coupled to present an output voltage at a battery potential locus and a protection device for providing a plurality of safeguards to protect the battery pack, affects operation of the protection device to control at least one safeguard and includes a current sensing unit coupled with the plurality of battery cells and with the protection device. The current sensing unit senses a battery traversing current associated with at least one battery cell. The current sensing unit generates an alerting signal when the battery traversing current exceeds a predetermined value. The protection device enables the at least one safeguard in response to the alerting signal.

Apparatus for improving protection of a battery pack in a very low power state

An apparatus for use with a charge control system for affecting current draw from a charging unit coupled at an input locus of the charge control system for charging a battery unit includes a current sink switchingly coupled with the input locus for selectively contributing a predetermined current draw at the input locus. A method for selectively establishing a predetermined current draw from a charging unit coupled at an input locus with a charge control unit for charging a battery unit includes the steps of: (a) providing a current sink switchingly coupled with the input locus; (b) sensing at least one predetermined condition in the battery unit; and (c) switchingly engaging the current sink when the at least one predetermined condition satisfies at least one predetermined criteria.

Method and apparatus for controlling current draw while charging a battery array

A method for controlling voltage levels among cells while charging a battery array to a target voltage uses cell balancing modes employing respective charging currents. The method includes the steps of: (a) In no particular order: (1) establishing a parametric criterion for identifying each balancing mode; (2) identifying a performance parameter associated with selected cells for each balancing mode; and (3) establishing an exit criterion for each balancing mode; (b) ascertaining the onset of charging; (c) identifying the extant balancing mode; (d) employing the charging current for the extant balancing mode for charging; (e) for selected cells: (1) obtaining an extant parameter associated with the cell; (2) comparing each extant parameter with the exit criterion; and (3) repeating steps (e)(1) through (e)(2) until the extant parameter satisfies the exit criterion; (f) terminating the extant balancing mode; (g) repeating steps (c) through (f) until target voltage is achieved; (h) terminating charging.

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Rowlett, TX, United States of America

Garry Ross Elder