Wenzhou University

Zhejiang Orient Gene Biotech Co., Ltd

Ningbo University

Healgen Scientific Limited

Ningbo Exciton Technology Co., Ltd.

Ningbo Jiangbei Exciton New Material Technology Co., Ltd.

Gang Li

Pengjun Wang

Bo Chen

Jianqiu Fang

Yuejun Zhang

Huihong Zhang

Hao Ye

Lili Shen

Xiangyu Li

Hui Li

Fangli Zhou

Shaohua Fang

Ziyu Zhou

Hongjiang Yu

Yan Zhang

Zhen Li

Rong Ma

Lun Li

Haijiang Tang

Jiana Lian

Xilong Shao

Yue Jun Zhang

Wenming He

Junjie Zhou

Li Ni

Yunfei Yu

Hongzhen Fang

Haoyu Qian

Huiling Chen

Songwei Zhao

Mingbo Wang

Zhipeng Liu

Ziying Ma

Suling Xu

Yuanfeng Xie

Hai Ming Zhang

Junyu Jia

Cai Long Jin

Yating Lu

Xuguang Zeng

Liwei Li

Qingbo Kong

Weizhong Huang

Chuncheng Wang

A reconfigurable PUF with two PUF functions comprises 2×n PUF cells, a sequential control module, a row selection module, n amplification modules, n first bit lines, and n second bit lines. Each of the 2×n PUF cells comprises a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor, a sixth NMOS transistor and a seventh NMOS transistor. The PUF cells can provide two independent responses, and can operate in a SRAM mode and an inverter mode. Therefore, the reconfigurable PUF with two PUF functions can operate both in the SRAM mode and the inverter mode, and a PUF operating mode with higher reliability is selected for generating final responses.

Reconfigurable PUF with two PUF functions

A voltage mode weak-PUF circuit with rich challenge-response pairs comprises four decoders, two PUF arrays, a sequential control circuit and a voltage comparator. One-to-two PUF arrays are used to replace existing one-to-one PUF arrays to increase the number of challenge-response pairs by 2times, from 2realized by the one-to-one PUF arrays to 2×2, wherein N=a+b. Each PUF cell comprises m*n PUF cells and n transmission gates, and adopts a simple common-source amplifier structure formed by a first PMOS transistor, a first NMOS transistor and a second NMOS transistor, wherein any one PUF cell in one PUF array can be compared with any one PUF cell in the other PUF array to generate an output response. The number of output responses is 2, so the proportion of the PUF cells for generating one challenge-response pair is 2/2=1/2, and the reuse rate of the same PUF cell is merely 1/2.

Voltage mode weak-PUF circuit with rich challenge-response pairs

A readout circuit for a high-precision vibration sensor comprises an on-chip self-test circuit, a low-noise charge amplifier, a correlated double sampling circuit, a PID feedback control circuit, a phase compensation circuit and Sigma-Delta. A self-test signal is amplified by the low-noise charge amplifier, low-frequency noise and offsets are filtered out by the correlated double sampling circuit, then a self-test path and a working path of a vibration sensor are separated in the time domain by the PID feedback control circuit, the phase compensation circuit performs zero compensation and pole compensation on the signal, and Sigma-Delta converts an analog signal into a high-precision digital signal.

Readout circuit for high-precision vibration sensor

A PUF circuit based on the threshold loss of MOSFETs comprises N stages of delay units and an arbiter. Each stage of delay unit comprises six inverters and four MOS transistors, wherein the four MOS transistors are all PMOS transistors or NMOS transistors. Each path in each stage of delay unit uses only one PMOS or NMOS transistor and does not use a transmission gate formed by a PMOS transistor and an NMOS transistor. Therefore, it reduces hardware cost. Each MOS transistor on the transmission path has a threshold loss, PMOS and NMOS transistors in a third inverter and a sixth inverter are in an on-state, and output terminals of the third inverter and the sixth inverter will be charged to a high level or discharged to a low level, thus greatly increasing a delay difference between two square signals and enhancing randomness.

PUF circuit based on threshold loss of MOSFETs

A device encrypted authentication method based on a strong physical unclonable function is disclosed, including: generating β matrixes formed by random transformation of a ┌√{square root over (b)}┐-order unit matrix, such that unnecessary device expenditure is reduced; when a sensing device is identified, information to be synchronized between the sensing device and a back-end server is transmitted in the registration phase, such that an attacker cannot obtain confidential information in the encryption phase, and the attacker cannot traverse or completely crack all these possible combinations in a short time; even if the attacker intercepts some CRPs, it is scarcely possible that data sent by the sensing device matches the CRPs collected by the attacker, and with the increase of the number b of bits of challenges and the quick convergence to 0, the accuracy of random guessing is only 50%.

Device encrypted authentication method based on strong physical unclonable function and device encrypted authentication system using the same

Seat for united test card

A PUF-based magnetometer with a safety protection circuit is provided. The PUF-based magnetometer includes a TMR magnetometer main structure, a control circuit, a column encoder circuit, a row encoder circuit, a multiplexer and a dynamic comparator. The TMR magnetometer main structure includes n*n TMR sensors, and the TMR magnetometer main structure can also form a PUF circuit together with a control circuit, a column encoder circuit, a row encoder circuit, a multiplexer and a dynamic comparator to realize a function of a TMR magnetometer. The PUF circuit generates PUF response signals based on random deviations of a TMR sensor fabrication process. The PUF response signals generated by the PUF circuit make it more difficult for attackers to locate specific positions of the TPR sensors, and even make it hard to know the existence of the deviations of the TMR sensors.

PUF-based magnetometer with safety protection circuit

United test card assembly

A machine learning attack resistant strong PUF with a dual-edge sampling function comprises switch units, a first arbiter and a second arbiter. The first arbiter is for determining a sequential order of delays at a rising edge of signals input to a first input terminal and a second input terminal of the first arbiter. The second arbiter is for determining a sequential order of delays at a falling edge of signals input to a first input terminal and a second input terminal of the second arbiter. Each switch unit is composed of eight MOS transistors. The strong PUF has a high capacity to resist machine learning attacks and small hardware expenditure through simple structural design of the switch units, realizing machine learning attack resistance and small hardware expenditure at the same time, and generating a large number of challenge response pairs through dual-edge sampling realized by the two arbiters.

Machine learning attack resistant strong PUF with dual-edge sampling function

Digital reader for immunoassay test device

United test card

A bistable physical unclonable function circuit based on subthreshold leakage current deviation comprises a time sequence control circuit, a decoder, 16 bias voltage converters and a PUF array, wherein the time sequence control circuit is used for generating a precharge signal and an enable signal, the decoder is used for converting an external stimulus signal into 16 decoded signals under the control of the precharge signal and the enable signal, the kbias voltage converter is used for converting the kdecoded signal into a kword line signal which is input to the PUF array, the PUF array is used for generating 16 response signals under the control of the precharge signal and the 16 word line signals, and comprises four PMOS transistors, four NMOS transistors, two two-input NAND gates and sixteen PUF units, and each PUF unit comprises two NMOS transistors.

Bistable physical unclonable function circuit based on subthreshold leakage current deviation

The invention discloses a multi-threshold segmentation method for medical images based on an improved salp swarm algorithm. A two-dimensional histogram is established by means of a grayscale image of a medical image and a non-local mean image, then a salp swarm algorithm is used to determine thresholds selected by a Kapur entropy-based threshold method, and the salp swarm algorithm is improved and mutated by an individual-linked mutation strategy during the threshold selection process to avoid local optimization, so that the segmentation effect on the medical image is optimized; and the method has the advantages of good robustness and high accuracy.

Multi-threshold segmentation method for medical images based on improved salp swarm algorithm

A low-power pulse output circuit comprises first to third PMOS transistors, first NMOS to third NMOS transistors, a resistor regulation module, a capacitor regulation module, an inverter and a buffer. Drains of the first PMOS and first NMOS transistors, gates of the first NMOS, second PMOS, second NMOS, and third NMOS transistors are connected. Drain of the second PMOS transistor, gate of the third PMOS transistor and one terminal of the resistor regulation module are connected. The other terminal of the resistor regulation module and drain of the second NMOS transistor are connected. Drain of the third PMOS transistor, drain of the third NMOS transistor and an input terminal of the inverter are connected. An output terminal of the inverter, the other terminal of the capacitor regulation module and an input terminal of the buffer are connected.

Low-power pulse output circuit

Calibrator device

Growing community of inventors

Zhejiang, China

Gang Li