Montage Technology (shanghai) Co., Ltd.

Innogrit Technologies Co., Ltd.

Shanghai Liangxin Electrical Co., Ltd

Montage Lz Semiconductor (shanghai) Co., Ltd.

Gang Hu

Yuanfei Nie

Meiwu Wu

Xuepeng Wang

Yu Chen

Xiaomin Si

Shen Feng

Zhen Lu

Xiaoli Rui

Wenxue Yang

Yinfang Huang

Shijia Zhu

Tianren Li

Yizheng Yang

Zining Wu

Yiu Leechung

Yuan-mao Chang

This application discloses a compression accelerator card, method of simulating hard disk mode to access the compression accelerator card. The method comprises: setting a compression identifier and sending a write command to a virtual compression hard disk by an application, and the write command is sent to a compression accelerator card via the virtual compression hard disk; compressing data by the compression accelerator card according to the compression identifier and caching the compressed data within the compression accelerator card, and returning a message to the application; setting a decompression identifier and sending a read command to the virtual compression hard disk by the application, the read command is sent to the compression accelerator card via the virtual compression hard disk, wherein the logical address corresponding to the read command is the same as the write command; and not decompressing the compressed data according to the decompression identifier by the compression accelerator card, and returning the compressed data to the application by the virtual compression hard disk. This application reduces CPU usage, minimizes changes to supporting software brought by migration from CPU compression to hardware compression, and reduces enterprise equipment cost.

Compression accelerator card and method of simulating hard disk mode to access the compression accelerator card

The present disclosure relates to a storage device and a storage system. The device comprises a storage, a storage controller, a control module, and a buffer module. The control module is configured to: when receiving a data read-write instruction, update the data read-write instruction by using a virtual address; apply for K buffer units in the buffer module; perform a write operation on the K buffer units by using data to be read and written; and when any of the K buffer units is full, directly start data transmission of the full buffer unit. By using the virtual storage address and by employing data block management, the present disclosure can update and forward an NVMe I/O command without applying for a storage space in advance, and can start data block transmission without checking the completion message.

Storage device and storage system

The present invention provides an arc-extinguishing device, including an arc-extinguishing chamber, where the arc-extinguishing chamber includes a support, a plurality of arc-extinguishing grid sheets, a first gas-evolving hood, and a second gas-evolving hood; the plurality of arc-extinguishing grid sheets are mounted on the supports, the arc-extinguishing grid sheet has a groove to form a moving track for a moving contact, both sides of the groove extend toward the moving contact respectively to form a first extension leg and a second extension leg, an end and an inner side of the first extension leg are wrapped by the first gas-evolving hood, and an end and an inner side of the second extension leg are wrapped by the second gas-evolving hood; a surface of the gas-evolving hood extending along the inner side of the extension leg toward the groove is referred to as a wrapping surface.

Arc-extinguishing device and circuit breaker provided with same

The present application disclosed a decision feedback equalization processing device and method. The device comprises: a channel estimator for receiving an input signal, and determining, based on the input signal, an input signal autocorrelation matrix R, an input-output signal cross-correlation matrix Rand an input-output signal cross-correlation vector r; a tap coefficient calculator for receiving R, Rand r, and calculating a feed-forward equalizer (FFE) tap coefficient vector g and a feedback equalizer (FBE) tap coefficient vector f, wherein at least one of the FFE tap coefficient vector g and the FBE tap coefficient vector f is calculated using a conjugate gradient descent algorithm. The tap coefficient calculator comprises: a circulant matrix construction unit and a fast Fourier transformation (FFT) calculating unit. And the device further comprises a decision feedback equalizer for receiving from the tap coefficient calculator the FFE tap coefficient vector g and the FBE tap coefficient vector f, and performing equalization on the input signal and generating an equalized output signal.

Decision feedback equalization processing device and method

A circuit for predistortion, comprising a digital predistorter configured to generate a modified digital signal by modifying an input baseband signal with a predistortion coefficient; a DAC configured to generate an analog signal by converting the modified digital signal; a PA configured to generate an amplified signal by amplifying the analog signal; an attenuator configured to generate an attenuated signal by attenuating the amplified signal; an ADC configured to generate a attenuated digital signal; a timing synchronizer configured to generate a synchronized amplified signal by synchronizing the attenuated digital signal with the modified digital signal; a statistics generator configured to generate a probability density function of a plurality of samples of the input baseband signal; an orthogonal basis function generator configured to generate a set of normalized orthogonal basis functions; a predistortion coefficient training circuit configured to generate an updated predistortion coefficient.

Circuit and method for predistortion

A channel estimation method and a channel estimation system based on time-domain training sequence are provided. The channel estimation system first acquires an initial channel vector used for channel estimation of a current frame, and calculates an algorithm initial vector based on a training sequence vector contained in a received receiving signal vector and the receiving signal vector, then performs estimation based on the initial channel vector and the algorithm initial vector and using a conjugate gradient method based on a preprocessing matrix to acquire each channel estimation value, and eventually perform noise reduction processing on each channel estimation value based on a first predetermined threshold value to acquire a final channel estimation value. Compared with the existing channel estimation methods, the present invention has a shorter delay and lower calculation complexity, and thus can be easily implemented.

Channel estimation method and system based on time-domain training sequence

The present invention relates to a method and system for channel estimation. First, pilot signals are extracted from a received multi-path signal, in which each pilot signal includes a first pilot and a second pilot. Then, an initially estimated channel frequency-domain response is obtained based on the extracted first pilot. Afterward, a frequency-domain response estimate of each pilot frequency in the second pilot is calculated according to the obtained initially estimated channel frequency-domain response, an actual value of each pilot frequency in the second pilot is obtained based on the extracted second pilot, and a deviation between the frequency-domain response estimate and the actual value of each pilot frequency is calculated. When it is detected that aliasing components exist in the initially estimated channel frequency-domain response, a center of each aliasing component is determined according to the deviation, so as to determine an estimated position of each aliasing component. Finally, the initially estimated channel frequency-domain response is corrected according to the estimated positions of the aliasing components, so as to obtain an accurate channel estimation response.

Method and system for channel estimation

Data rate conversion devices and methods are provided. A method for converting a first digital signal having a first sampling rate into a second digital signal having a sampling rate close to a predetermined second sampling rate comprises the following operations: when the ratio of the first sampling rate to the second sampling rate is a repeating infinite decimal, calculate at least two calibrating coefficient values and output the calibrating coefficient values according to a predetermined rule; conduct overflow operation on the output calibrating coefficient; and interpolate the first digital signal using the output calibrating coefficient and the result of the overflow operation to obtain the second digital signal such that during any period of a certain length along time axis, sampling times of the second digital signal equals to sampling times of the second sampling rate.

Data rate conversion device and method

The present invention relates to a blind adaptive filter for narrowband interference cancellation, which includes an adaptive filter, a delay unit coupled to the adaptive filter for generating a delayed signal with a predetermined delay length from the output signal of the adaptive filter, and an error calculation unit coupled to the adaptive filter and the delay unit. The error calculation unit compares the output signal from the adaptive filter and the delayed signal from the delay unit to extract error information, and feedback the first error information to the adaptive filter. The first error information is formed of a transfer function including a number of coefficients, and used to adjust the adaptive filter and remove interference in the next input signal. The disclosed technique is also applicable in wideband receivers, as well as resisting multiple strong narrowband interferences having a frequency sweep rate of tens of milliseconds.

Blind adaptive filter for narrowband interference cancellation

A method and system for canceling an interference signal are provided. In the method, a received signal is transformed from a time domain to a frequency domain at relative low precision to obtain an estimated frequency and an estimated amplitude of the interference signal. A reference signal is generated using the estimated frequency and the estimated amplitude. An error signal is generated using the received signal and the reference signal based on minimum correlation criteria. The reference signal is adjusted using the error signal based on an adaptive algorithm. The reference signal is subtracted from the received signal to obtain the useful signal.

Method and apparatus for detection and cancellation of single-tone or multi-tone interference in communication systems

A method and apparatus for measuring parameters of a receiver having a mixer for generating an I signal and a Q signal using an input signal, an I channel circuit for processing the I signal, and a Q channel circuit for processing the Q signal. The method includes feeding the receiver a first testing signal before the mixer. The method includes feeding the receiver a second testing signal on the I channel circuit. The method includes feeding the receiver a third testing signal on the Q channel circuit. The method includes measuring I/Q quadrature deviation and I/Q delay imbalance of the receiver using the first, the second, and the third testing signals. This separates the I/Q quadrature deviation and I/Q delay imbalance.

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Shanghai, China

Gang Hu