Semiconductor Components Industries, LLC

Gang Chen

Gabor Reizik

Michael A Stapleton

Rong-Shyang Ou

Tod F Schiff

Xin Zhang

Chunbo Liu

Paul Jay Harriman

Kisun Lee

Weiyun Chen

Christopher Ben Bartholomeusz

Kieran Burke

Marian Poncik

Lung Wai Chris Chan

Chi Tak Leung

A circuit for controlling a switching power supply includes a disable signal generator generating a disable signal in response to an input clock signal, a timer circuit generating a timeout signal in response to the disable signal, a comparison signal generator generating a comparison signal in response to an output signal of the power supply, a first threshold signal generator generating a first threshold signal in response to the comparison signal, the first threshold signal having a value greater than that of the comparison signal, and a first comparator comparing the first threshold signal and a sense signal to de-assert the modulation signal when the sense signal is equal to or greater than the first threshold signal and the timeout signal has a first logic value.

System and method for controlling switching power supply

Variable delay time in power converters. At least some example embodiments are methods of operating a power converter, the methods comprising: inducing, by a converter controller, a positive voltage and a positive current on a secondary winding of a transformer of a power converter, the inducing by a bridge circuit coupled to a primary winding of the transformer; creating, by the converter controller, a first ramp signal proportional to the positive current; sensing a first inductor current through a first inductor, the first inductor coupled between the secondary winding and a load, and the sensing creates a signal indicative of the first inductor current; and changing conductive state of a first freewheeling switch from conductive to non-conductive when a magnitude of the first ramp signal crosses a magnitude of the signal indicative of the first inductor current.

Methods and systems of variable delay time in power converters

A method includes converting an input signal into an output signal in response to a modulation signal, generating a timeout signal in response to the modulation signal, generating a comparison signal according to the output signal, determining whether the comparison signal is equal to or greater than a sense signal, determining whether the timeout signal has a first logic value, and causing the modulation signal to have the first logic value when the comparison signal is equal to or greater than the sense signal and the timeout signal has the first logic value. A switching power supply circuit includes a power converter, a timer circuit generating the timeout signal, and a controller causing the modulation signal to have the first logic value when the comparison signal is equal to or greater than the sense signal and the timeout signal has the first logic value.

A controller controls Pulse Width Modulation (PWM) signals of one or more phases. The controller includes a phase sequencer to select a phase, a common ramp generator generating a common ramp signal, a phase activation circuit to turn on the PWM signal of the selected phase based on the common ramp signal, and for each phase a Current Sense plus Ramp (CSR) signal generator to generate a phase CSR signal according to a current of the phase and a phase deactivation circuit to turn off the PWM signal of the phase based on the phase CSR signal. A method of controlling PWM phases comprises selecting a phase, generating a common ramp signal, turning on the PWM signal of the selected phase based on the common ramp signal, generating CSR signals according to currents of the phases, and turning off the PWM signals based on the respective CSR signals.

Multi-phase control for pulse width modulation power converters

A circuit generates an output voltage from an input voltage and includes a Pulse Width Modulation (PWM) controller. The PWM controller initiates a PWM pulse according to a first comparison that uses a Current Sense and Ramp (CSR) signal and an error signal. The PWM controller ends the PWM pulse according to a second comparison that uses the CSR signal and a threshold signal. The CSR signal is generated using a current sense signal and a ramp signal according to the input voltage. The error signal is generated from the output voltage and a reference voltage. In an embodiment, the circuit is one of a plurality of substantially identical modules, wherein one module is a master module. The master module generates an error signal used by each module. A clock input of each module is respectively connected to a clock output of another module to sequentially activate each of the modules.

Pulse width control for switching mode power converters

A voltage regulator includes a first feedback circuit, a second feedback circuit, and a feedback signal adaptive circuit. The first voltage feedback circuit includes an amplifier that is configured to generate a compensation signal according to a feedback signal from an output of the voltage regulator and a reference voltage, while the second voltage feedback circuit includes a comparator that is configured to generate a PWM signal to drive a switch circuit in which the comparator initiates the PWM pulse when the feedback voltage goes lower than the compensation signal and ends the PWM pulse when the sum of the feedback signal and a ramp signal exceeds the sum of the compensation signal and a threshold signal. The feedback signal adaptive circuit modifies the feedback signal according to changes in an input voltage of the voltage regulator and a control signal.

Adaptive feedback control system and method for voltage regulators

Improved current doubling DC-DC converters having an efficient sleep mode. An illustrative converter embodiment includes: a transformer, first and second inductors coupled together at a first voltage output terminal, a reserve capacitor coupled to a second output voltage terminal, a primary switch array, a secondary switch array, and a controller. The first and second inductors each have a drive terminal coupled to a respective terminal of the transformer secondary. The primary switch array operates to convert an input voltage into forward voltage pulses and reverse voltage pulses on the transformer primary. The secondary switch array selectively couples the first inductor's drive terminal to either a charge terminal of the reserve capacitor or to the second voltage output terminal. The controller at least temporarily suspends operation of the primary switch array during a sleep mode, and uses the reserve capacitor to sustain a voltage at the first voltage output terminal.

Current doubling DC-DC converter with efficient sleep mode

An illustrative current-doubling DC-DC conversion method includes: converting an input voltage into forward voltage pulses and reverse voltage pulses on a primary of a transformer having a secondary coupled between a drive terminal of a first inductor and a drive terminal of a second inductor, the first and second inductors each having a common terminal coupled to a first output voltage terminal; selectively coupling the first inductor's drive terminal to a charge terminal of a reserve capacitor or to a second output voltage terminal, the first inductor's drive terminal being coupled to the charge terminal at least during the forward voltage pulses; selectively coupling the second inductor's drive terminal to the charge terminal of the reserve capacitor or to the second output voltage terminal, the second inductor's drive terminal being coupled to the charge terminal at least during the reverse voltage pulses; and concurrently coupling the drive terminals of the first and second inductors to the charge terminal to concurrently boost current flow through the first and second inductors in response to a load transient.

Fast response for current doubling DC-DC converter

A voltage regulator includes a control circuit, a switch circuit, a first over-current protection circuit, and a second over-current protection circuit. The control circuit generates a pulse-width modulation (PWM) signal having a duty cycle proportional to an output voltage of the voltage regulator. The first over-current protection circuit blocks the PWM signal when an over-current condition exists during an off time of the PWM signal until a low-side switch current-sense level in the switch circuit drops below a set current limit level, while the second over-current protection circuit turns off the PWM signal when an over-current condition occurs during an on time of the PWM signal when a ramp adjusted voltage level added to the low-side switch current-sense level exceeds a summed level of the set current limit level and a set threshold.

Over-current protection circuit and method for voltage regulators

A switching power supply includes a signal generator providing a selected signal according to a first signal and a second signal, a controller generating a modulation signal in response to the selected signal, and a power converter converting an input signal into an output signal in response to the modulation signal. The first signal has a first ripple amplitude, and the second signal has a second ripple amplitude less than the first ripple amplitude.

A current sensing circuit for a switched mode power converter employs a passive current sensing network coupled in parallel with the switched inductor. The passive current sensing network is impedance matched to the inductance its inherent resistance, and provides a current sensing node for single wire current sensing by a current sensing circuit. The passive current sensing network can be employed in each of a plurality of phased switching circuits that each contribute to an output of the power converter.

Current sensing circuit for switching power converters

In one embodiment, a method of forming a ripple suppressor circuit includes a configuring the ripple suppressor circuit to receive a first signal that is representative of a requested voltage and a second signal that is a filtered value of the first signal. The method also includes configuring the ripple suppressor circuit to determine a peak value of the second signal responsively to the first signal and to determine a minimum value of the second signal responsively to the first signal. The method may also include configuring the ripple suppressor circuit to form an average value of the peak value and the minimum value.

Ripple suppressor circuit and method therefor

In one embodiment, a method of forming a multi-channel power supply controller includes forming a plurality of channels configured to regulate an output voltage between first and second values, configuring the controller to select a channel that has a lowest current value and initiate forming a drive signal for that channel responsively to the output voltage having a value that is less than the first value, configuring a reset circuit for each channel to terminate the respective drive signal responsively to at least the output voltage having a value greater than the first value.

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Hong Kong, China

Gang Chen