Lsi Logic Corporation

Lsi Corporation

Ganesan Viswanathan

Brian A Day

Vetrivel Ayyavu

Patrick R Bashford

Timothy E Hoglund

Ayyavu Vetrivel

A method and circuit for enhancing the performance in a serial ATA interface uses a standard ATA queue automation circuitry that handles all the transmit/receive frame information structure (FIS) operations for ATA queue commands without interrupting the higher-level software and associated hardware, firmware, and drivers. If the standard ATA queue automation circuitry and command queues are not provided, then every FIS operation will interrupt the higher layer application program. The standard ATA queuing automation circuit preprocesses higher layer commands to write into the task file registers before initiating the transport layer for an FIS transmission and provides information regarding the success or failure of a command. Commands to be executed and completion command queues are preferably used to improve the performance further. These queues may be implemented within the higher layers, as part of the standard ATA queuing automation circuit, or as software, firmware, and/or hardware functionally located between the standard ATA queuing automation circuit and the higher layers. The standard ATA queue automation circuitry provides information to program the DMA controller and activates the DMA automatically for the data transfer.

Standard ATA queuing automation in serial ATA interface for creating a frame information structure (FIS) corresponding to command from transport layer

The present invention is directed to a method and apparatus of automatic power management control for a Serial ATA interface that utilizes a combination of IOP control and specialized hardware control. The method may include steps as follows. It is determined, preferably based on a value of the Automate bit in a Task File Ram of a Serial ATA interface, whether a Serial ATA device of the Serial ATA interface is being controlled via the IOP or controlled by the specialized Serial ATA automation hardware. When the Serial ATA device is controlled via the IOP, the IOP may decide when to power up/down the Serial ATA interface. When the Serial ATA device is controlled by the specialized Serial ATA automation hardware, the method may proceed as follows. An idle or active condition of a Serial ATA interface utilizing a combination of IOP control and specialized hardware control is then automatically detected. When Serial ATA is in an idle condition, idle time of Serial ATA interface is measured using a power down counter whose frequency is determined by a programmable register based on an input clock. When a power down counter value is equal to a first value, a request for a Partial power state is asserted, and Serial ATA interface is put into a Partial power state. When a power down counter value is equal to a second value, a request for a Slumber power state is asserted, and Serial ATA interface is put into a Slumber power state.

Method and apparatus of automatic power management control for Serial ATA interface utilizing a combination of IOP control and specialized hardware control

The present invention is directed to a method and apparatus of automatic power management control for a Serial ATA device directly attached to a SAS/SATA host controller. In an exemplary aspect of the present invention, it is determined whether a Serial ATA device is directly attached to a SAS/SATA host controller without using a SAS expander. When it is determined that the Serial ATA device is directly attached to the SAS/SATA host controller, an idle or active condition of a Serial ATA interface including the Serial ATA device and the SAS/SATA host controller is automatically detected. When the Serial ATA interface is in an idle condition, idle time of the Serial ATA interface is measured using a power down counter whose frequency is determined by a programmable register based on an input clock. When a power down counter value is equal to a first value, a request for a Partial power state is asserted, and Serial ATA interface is put into a Partial power state. When a power down counter value is equal to a second value, a request for a Slumber power state is asserted, and Serial ATA interface is put into a Slumber power state.

Method and apparatus of automatic power management control for serial ATA device directly attached to SAS/SATA host controller

The present invention is directed to a method and apparatus of automatic power management control for Serial ATA interface. In an exemplary aspect of the present invention, an idle or active condition of Serial ATA interface is automatically detected. When Serial ATA is in an idle condition, idle time of Serial ATA interface is counted using a power down counter whose frequency is determined by a programmable register based on input clock. When a power down counter value is equal to a first value, a request for a Partial power state is asserted, and Serial ATA interface is put into a Partial power state. When a power down counter value is equal to a second value, a request for a Slumber power state is asserted, and Serial ATA interface is put into a Slumber power state.

Method and apparatus of automatic power management control for Serial ATA interface

The present invention is directed to a method and apparatus of automatic power management control for Serial ATA interface. In an exemplary aspect of the present invention, an idle or active condition of a Serial ATA interface including a NCQ Serial ATA device is automatically detected. In this step, it is determined, preferably based on a value of the FPDMA (First Party Direct Memory Access) bit in a Task File Ram of the Serial ATA interface, whether the NCQ Serial ATA device is in a FPDMA Data Phase. When the NCQ Serial ATA device is in a FPDMA Data Phase, the Serial ATA interface is active (i.e., not idle). When Serial ATA is in an idle condition, idle time of Serial ATA interface is measured using a power down counter whose frequency is determined by a programmable register based on an input clock. When a power down counter value is equal to a first value, a request for a Partial power state is asserted, and Serial ATA interface is put into a Partial power state. When a power down counter value is equal to a second value, a request for a Slumber power state is asserted, and Serial ATA interface is put into a Slumber power state.

Method and apparatus of automatic power management control for native command queuing Serial ATA device

A device generally comprising a first circuit and a second circuit. The first circuit may be configured to (i) communicate with a host via a first bus (ii) using a small computer system interface (SCSI) protocol having a plurality of command descriptor blocks. The second circuit configured to (i) communicate with a remote device with a via a second bus, (ii) using an advanced technology attachment (ATA) protocol and (iii) translate a subset of the command descriptor blocks to the ATA protocol in application specific hardware.

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Duluth, GA, United States of America

Ganesan Viswanathan