Hewlett-packard Development Company, L.p.

Samsung Electronics Co., Ltd.

Hewlett-packard Company

Hewlett-packard Development, L.p.

Galen H Kawamoto

Adam L Ghozeil

James William Stasiak

Kevin Francis Peters

Dennis J Schloeman

Hang Liao

Richard R Clark

Bao Yeh

Sriram Ramamoorthi

Xiaofeng Yang

Donald W Schulte

Deepika Sharma

A firing circuit for a thermal inkjet-printing nozzle includes a heater resistor and a switch. The heater resistor heats ink to cause the ink to be ejected from the nozzle. The heater resistor has a first end and a second end, the second end connected to a ground. The switch controls activation of the heater resistor. The switch has a first end connected to a voltage source and a second end connected to the first end of the heater resistor. The switch operates in a constant current mode, such that an at least substantially constant current flows through the heater resistor upon activation.

Constant current mode firing circuit for thermal inkjet-printing nozzle

A nanoscopic transistor is made by forming an oxide layer on a semiconductor substrate, applying resist, patterning the resist using imprint lithography to form a pattern aligned along a first direction, applying a first ion-masking material over the pattern, selectively lifting it off to leave a first ion mask to form a gate, forming doped regions by implanting a suitable dopant, applying another layer of resist and patterning the second resist layer using imprint lithography to form a second pattern aligned along a second direction, applying a second ion-masking material over the second pattern, selectively lifting it off to leave a second ion mask defined by the second pattern, and forming second doped regions in the substrate by implanting a suitable second dopant selectively in accordance with the second ion mask. The method may be used to make an array of nanoscopic transistors.

Methods of fomring array of nanoscopic MOSFET transistors

Array of nanoscopic MOSFET transistors and fabrication methods

This disclosure relates to misalignment-tolerant processes for fabricating multiplexing/demultiplexing architectures. One process enables fabricating a multiplexing/demultiplexing architecture at a tolerance greater than a pitch of conductive structures with which the architecture is capable of communicating. Another process can enable creation of address elements and conductive structures having substantially identical widths.

Misalignment-tolerant methods for fabricating multiplexing/demultiplexing architectures

This disclosure relates to misalignment-tolerant multiplexing/demultiplexing architectures. One architecture enables communication with a conductive-structure array having a narrow spacing and pitch. Another architecture can comprise address elements having a width substantially identical to that of conductive-structures with which each of these address elements is capable of communicating. Another architecture can comprise rows of co-parallel address elements oriented obliquely relative to address lines and/or conductive structures.

Misalignment-tolerant multiplexing/demultiplexing architectures

Array of nanoscopic mosfet transistors and fabrication methods

A semiconductor antifuse device that utilizes a resistive heating element as both a heating source or fuse blowing and as part of the fuse link. The antifuse device may also be utilized as a fuse and the antifuse or fuse embodiment can be programmed and read with the same two electrodes. The antifuse or fuse is well suited for use and efficient fabrication in a printhead apparatus or other circuit arrangements.

Thinfilm fuse/antifuse device and use of same in printhead

Growing community of inventors

Corvallis, OR, United States of America

Galen H Kawamoto