Broadcom Corporation

Broadlight Ltd.

Avago Technologies International Sales Pte. Limited

Gal Sitton

Eliezer Weitz

Gil Levy

Eli Elmoalem

David Avishai

Asaf Koren

Ifat Naaman

Moti Kurnick

Doron Tal

Igor Elkanovich

Ryan E Hirth

Amiad Dvir

Raviv Weber

Michael Balter

David Ivancovsky

Alex Goldstein

Yariv Aviram

Oren Issac Wolach

Ira Joffe

Mitchell Gordon McGee

Yoav Levy

Assaf Amitai

Daniel Pasternak

Jacob Harel

Hilla Ben Yaacov

Yoram Gorsetman

Igor Ternovsky

Koby Harel

Yanai Pomeranz

Tal Baum-Mizrachi

The present disclosure is directed to a network processor for processing high volumes of traffic provided by todays access networks at (or near) wireline speeds. The network process can be implemented within a residential gateway to perform, among other functions, routing to deliver high speed data services (e.g., data services with rates up to 10 Gbit/s) from a wide area network (WAN) to end user devices in a local area network (LAN).

Network processors

A method for deep-packet inspection of packets flowing through an end unit in a point-to-multipoint network. The method comprises classifying packet flows through the end unit using their flow-identification (ID) to determine which of the packet flows should be deep-packet inspected, wherein the packet flows include incoming packets received from a central unit and outgoing packets sent to the central unit of the point-to-multipoint network; duplicating packets determined to be deep-packet inspected; saving all duplicated packets in a memory; upon collection of a predefined number of duplicated packets belonging to a certain flow-ID, performing deep-packet processing based on at least one deep-packet inspection application; and saving the deep-packet processing results in the memory.

Method and system for performing distributed deep-packet inspection

A passive optical network (PON) packet processor for processing PON traffic includes a core processor for executing threads related to the processing of PON traffic and a plurality of hardware (HW) accelerators coupled to the core processor for accelerating the processing of said PON traffic. A memory unit is coupled to the core processor for maintaining program and traffic data. In an embodiment of the present invention, the PON packet processor includes a scheduler that optimizes the execution of PON related tasks.

Passive optical network (PON) packet processor

A method for processing data flows of a plurality of passive optical network (PON) operating modes, the method is performed by an optical network unit (ONU). The method comprises processing upstream data flows of said plurality of PON operating modes; and processing downstream data flows of the plurality of PON operating modes. The plurality of PON operating modes include at least a Gigabit PON (GPON) mode, a broadband PON (BPON) mode, and an Ethernet PON (EPON).

Enhanced passive optical network (PON) processor

A method and apparatus embodying some aspects of a packet processing communication system. The packet processing communication apparatus comprises a packet processor and a microprocessor. The packet processor is configured to process packets belonging to a certain flow through a plurality of processing stages of a programmable data-path. The microprocessor is in communication with the packet processor and is configured to process a user-defined function in the programmable data-path on designated packets belonging to the certain flow. The packets of respective flows to be processed by the microprocessor are designated in a mapping. The designated packets processed by the microprocessor are returned to one of the processing stages of the packet processor for further processing.

Passive optical network processor with a programmable data path

A passive optical network (PON) processor comprises a packet processor for processing packets belonging to a certain flow through a plurality of processing stages of a programmable data-path; a microprocessor-data for performing one or more user-defined functions in the programmable data-path on designated packets belonging to the certain flow, wherein packets of respective flows to be processed by the microprocessor-data are designated in a flow table; a microprocessor-control for managing connections handled by the PON processor; a data-path bus for connecting the packet processor and the microprocessor-data, wherein the designated packets are transferred between the packet processor and the microprocessor-data on the data-path bus; and a control-path bus for connecting the packet processor and the microprocessor-control.

Burst mode clock and data recovery (BCDR) circuit and method capable of fast data recovery of passive optical network (PON) traffic. An over-sampled data stream is generated from an input burst data signal and a phase interpolator generates sampling clock signals using a reference clock and phase information. A phase estimation unit (PEU) determines a phase error in the over-sampled data streams; and a phase retrieval unit sets the phase interpolator with the respective phase information of the input burst data signal prior to reception of the input burst data signal.

Burst mode clock and data recovery circuit and method

An optical line terminal (OLT) performs power management control in a passive optical network (PON) by acquiring a respective reception level for each optical network unit (ONU) in the PON and maintaining a reception table that stores the respective reception level for each ONU. Prior to receiving a burst signal from an ONU, it sets a reception threshold of an optical receiver at the OLT with the reception level of the ONU.

Method and system for power management control in passive optical networks

An enhanced optical line terminal (OLT) controller capable of providing traffic processing features. The OLT controller comprises an Ethernet switch operable in a stacking mode and being capable of mapping between Ethernet addresses and passive optical network (PON) addresses. The Ethernet switch is connected to a PON medium access control (MAC) adapter via a stacking port and being capable of processing Ethernet frames relayed on the PON network. The mapping information is kept by the Ethernet switch in a forwarding table.

Enhanced optical line terminal controller

An enhanced passive optical network (PON) processor adapted to serve a plurality of PON applications is disclosed. The PON processor is a highly integrated communications processor that can operate in different PON modes including, but not limited to, a gigabit PON (GPON), a broadband PON (BPON), an Ethernet PON (EPON), or any combination thereof. In an embodiment of the present invention the provided PON is fabricated on a single integrated circuit (IC).

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Netanya, Israel

Gal Sitton