Intel Corporation

Gal Leibovich

Tomer Bar-On

Jeremie Dreyfuss

Yaniv Fais

Lev Faivishevsky

Jacob Subag

Amit Bleiweiss

Ehud Cohen

Tomer Schwartz

Amitai Armon

Uzi Sarel

Yahav Shadmiy

Michael Behar

Itamar Ben-Ari

Guy Jacob

Efraim Rotem

Doron Rajwan

Nir Rosenzweig

Galina Ryvchin

Gal Novik

Eyal Yaacoby

Eliezer Weissmann

Nadav Shulman

Yoni Aizik

Hisham Abu Salah

Jorge Pedro Rodriguez

Tomer Ziv

Jeffrey A Carlson

Yevgeni Sabin

Shay Levy

Amit Gabai

Dmitri Vainbrand

Yonatan Glesner

In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.

Low rank matrix compression

In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to expose embedded cast operations in at least one of a load instruction or a store instruction; determine a target precision level for the cast operations; and load the cast operations at the target precision level. Other embodiments are also disclosed and claimed.

Variable precision and mix type representation of multiple layers in a network

In an example, an apparatus comprises a plurality of execution units and logic, at least partially including hardware logic, to gate at least one of a multiply unit or an accumulate unit in response to an input of value zero. Other embodiments are also disclosed and claimed.

Multiply-accumulate '0' data gating

In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer.

In an example, an apparatus comprises a plurality of execution units; and logic, at least partially including hardware logic, to determine a sub-graph of a network that can be executed in a frequency domain and apply computations in the sub-graph in the frequency domain. Other embodiments are also disclosed and claimed.

Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU

Methods and apparatus relating to techniques for incremental network quantization. In an example, an apparatus comprises logic, at least partially comprising hardware logic to determine a plurality of weights for a layer of a convolutional neural network (CNN) comprising a plurality of kernels; organize the plurality of weights into a plurality of clusters for the plurality of kernels; and apply a K-means compression algorithm to each of the plurality of clusters. Other embodiments are also disclosed and claimed.

Per kernel Kmeans compression for neural networks

In one embodiment, a processor comprises: a plurality of processing engines including a first processing engine and a second processing engine to independently execute instructions; and a power controller including a performance state control logic to control a performance state of at least one of the processing engines, and a first logic to determine an average number of active processing engines over a first window, an estimated activity level of the processor for the first window, and adjust at least one of a window length at which the performance state control logic is to perform a performance state determination and at least one activity level threshold, based at least in part on a comparison of the estimated activity level and the average number of active processing engines. Other embodiments are described and claimed.

Controlling performance states of processing engines of a processor

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Kiryat Yam, Israel

Gal Leibovich