Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Stmicroelectronics S.r.l.

Centre National De La Recherche Scientifique

Université Grenoble Alpes

Other

Commissariat a L'energie Atomique Et Aux Energies

Commissariat a L'energie Atomique Et Aux Energies Alternatives

Gabriele Navarro

Paolo Giuseppe Cappelletti

Chiara Sabbione

Bruno Reig

Marie-Claire Cyrille

Damien Saint-Patrice

Mathieu Bernard

Alexandre Leon

Vincent Puyal

Bernard Dieny

Elisa Vianello

Olivier Joubert

Maxime Darnon

Christelle Charpin-Nicolle

Eric Jalaguier

Anthonin Verdy

Guillaume Bourgeois

Serge Blonkowski

Selina La Barbera

Nicolas Guillaume

Niccolo Castellani

Patrice Gonon

Anna-Lisa Serra

Camille Laguna

A selection element including, in a first portion, a stack of amorphous layers, the thickness of each layer in the stack being smaller than or equal to 20 nm.

Selection element with a plurality of amorphous layers

A selective non-volatile memory device includes a first electrode, a second electrode and at least one layer made of an active material. The device has at least two programmable memory states associated with two voltage thresholds and also provides a selective role when it is in a highly resistive state.

Selective non-volatile memory device and associated reading method

A method for programming a phase change memory including a first layer of a phase change material capable of switching between a crystalline and an amorphous state and vice versa, the method including applying a programming current through the first layer so that an evolution of the areal density of this current as a function of time t decreases from a first level, between a first time and a second time, following a first evolution in time respecting, or being close to where K is a constant.

Method for programming a phase change memory

A filament type non-volatile memory device, includes a first electrode, a second electrode and an active layer extending between the first electrode and the second electrode, the active layer electrically interconnecting the first electrode to the second electrode, the device being suitable for having: a low resistive state, in which a conducting filament electrically interconnecting the first electrode to the second electrode uninterruptedly extends from end to end through the active layer, the filament having a low electric resistance, and a highly resistive state, in which the filament is broken, the filament having a high electric resistance. The device further includes a shunt resistance electrically connected in parallel to the active layer, between the first electrode and the second electrode.

Filamentary type non-volatile memory device

A phase change resistive memory includes an upper electrode; a lower electrode; a layer made of an active material, called an active layer; the memory passing from a highly resistive state to a weakly resistive state by application of a voltage or a current between the upper electrode and the lower electrode and wherein the material of the active layer is a ternary composed of germanium Ge, tellurium Te and antimony Sb, the ternary including between 60 and 66% of antimony Sb.

Phase-change resistive memory

Phase-change memory cells and methods of manufacturing and operating phase-change memory cells are provided. In at least one embodiment, a phase-change memory cell includes a heater and a stack. The stack includes at least one germanium layer or a nitrogen doped germanium layer, and at least one layer of a first alloy including germanium, antimony, and tellurium. A resistive layer is located between the heater and the stack.

Phase-change memory cell

A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.

Memory device

A phase-change storage element including, in a first portion, a stack of amorphous layers, the thickness of each layer in the stack being smaller than or equal to 5 nm.

Storage element

A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium. In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.

An elementary cell includes a non-volatile resistive random-access memory mounted in series with a volatile selector device, the memory including an upper electrode, a lower electrode and a layer made of a first active material, designated memory active layer. The selector device includes an upper electrode, a lower electrode and a layer made of a second active material, designated selector active layer. The cell includes a one-piece conductor element including a first branch having one face in contact with the lower surface of the memory active layer in order to form the lower electrode of the memory, a second branch having one face in contact with the upper surface of the selector active layer in order to form the lower electrode of the memory.

Elementary cell comprising a resistive random-access memory and a selector, stage and matrix of stages comprising a plurality of said cells and associated manufacturing method

A method for programming a phase change memory cell placed in an initial crystalline state, the memory cell being called of taking a plurality of resistance values belonging to a range of values called 'programming window', the method including parameterizing a lower limit of the programming window by applying to the memory cell a single gradual writing voltage pulse or a first series of identical gradual writing voltage pulses; progressively adjusting the resistance value of the memory cell by the following operations: a gradual erasing operation during which a series of identical gradual erasing voltage pulses is applied to the memory cell; a gradual writing operation during which a second series of identical gradual writing voltage pulses is applied to the memory cell; the gradual writing and gradual erasing voltage pulses have a width less than 50 ns.

Analog method for programming a phase change memory cell by means of identical electrical pulses

A method for manufacturing resistive random access memories, each resistive random access memory including first and second electrodes separated by a layer of active material, the method including producing connector elements with a step Cp along a first direction, each connector element having a width Cb along the first direction; producing a plurality of first electrodes with a step Ep along the first direction, each first electrode having a first end surface and a second end surface, the second end surface having a width Eb along the first direction and an area greater than the area of the first end surface; wherein:

Method for manufacturing a resistive random access memory; having reduced variability of electrical characteristics

Switch including a phase change materials based structure where only one part is activatable

A method for manufacturing a resistive device, includes depositing a first electrically conductive layer on a substrate; forming an etching mask on the first conductive layer; etching the first conductive layer through the mask, such as to obtain a plurality of electrically conductive pillars separated from one another; and forming storage elements with variable electrical resistance at the tops of the electrically conductive pillars, such that each storage element is supported by one of the electrically conductive pillars, the step of forming the storage elements including the following operations depositing a first layer by non-collimated cathode sputtering at normal incidence relative to the substrate; and depositing a second layer on the first layer by cathode sputtering, the second layer including a first chemical species sputtered at an oblique incidence.

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Grenoble, France

Gabriele Navarro