Arm Limited

Gabriele Calianno

Guillaume Bolbenes

Vincenzo Consales

Paolo Monti

Pierre-Julien Kirsch

Circuitry comprises a translation lookaside buffer to store data representing memory address translations, each memory address translation being between an input memory address range defining a contiguous range of one or more input memory addresses in an input memory address space and a translated output memory address range defining a contiguous range of one or more output memory addresses in an output memory address space; in which the translation lookaside buffer comprises a plurality of memory elements to store one or more arrays each having a base input memory address, a base output memory address and a plurality of entries each mapping an n-bit offset to an m-bit offset, each entry representing a memory address translation of an input memory address range defined by the respective n-bit offset relative to the base input memory address to a translated output memory address range defined by the respective m-bit offset relative to the base output memory address; in which n and m are positive integers and n is different to m.

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Antibes, France

Gabriele Calianno