Kepler Computing Inc.

Gabriel Antonio Paulius Velarde

Niloy Mukherjee

Ramamoorthy Ramesh

Jason Y Wu

Sasikanth Manipatruni

Fnu Atiquzzaman

Amrita Mathuriya

Noriyuki Sato

Rajeev Kumar Dokania

Tanay Gosavi

Somilkumar J Rathi

Mauricio Manfrini

Pratyush Pandey

Zeying Ren

James Clarkson

James David Clarkson

Debraj Guhabiswas

Maria Isabel Perez

Saskikanth Manipatruni

Non lead-based perovskite ferroelectric devices for high density memory and logic applications and methods of fabrication are described. While various embodiments are described with reference to FeRAM, capacitive structures formed herein can be used for any application where a capacitor is desired. For example, the capacitive structure can be used for fabricating ferroelectric based or paraelectric based majority gate, minority gate, and/or threshold gate.

High density ferroelectric random access memory (FeRAM) devices and methods of fabrication

A memory device includes a first electrode comprising a first conductive nonlinear polar material, where the first conductive nonlinear polar material comprises a first average grain length. The memory device further includes a dielectric layer comprising a perovskite material on the first electrode, where the perovskite material includes a second average grain length. A second electrode comprising a second conductive nonlinear polar material is on the dielectric layer, where the second conductive nonlinear polar material includes a third grain average length that is less than or equal to the first average grain length or the second average grain length.

Rapid thermal annealing (RTA) methodologies for integration of perovskite-material based memory devices

Method of fabricating a perovskite-material based planar capacitor using rapid thermal annealing (RTA) methodologies

Method of fabricating a perovskite-material based trench capacitor using rapid thermal annealing (RTA) methodologies

Rapid thermal annealing (RTA) methodologies for integration of perovskite-material based trench capacitors

Described are ferroelectric device film stacks which include a templating or texturing layer or material deposited below a ferroelectric layer, to enable a crystal lattice of the subsequently deposited ferroelectric layer to template off this templating layer and provide a large degree of preferential orientation despite the lack of epitaxial substrates.

Ferroelectric device film stacks with texturing layer which is part of a bottom electrode, and method of forming such

Ferroelectric device film stacks with texturing layer which is part of a bottom electrode and a barrier, and method of forming such

Ferroelectric device film stacks with texturing layer, and method of forming such

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San Leandro, CA, United States of America

Gabriel Antonio Paulius Velarde