Semiconductor Components Industries, LLC

Analog Devices,inc.

Gabor Reizik

Gang Chen

Richard Redl

Jonathan Mark Audy

Brian P Erisman

Tod F Schiff

Chunbo Liu

Paul Jay Harriman

Kisun Lee

Yuxin Li

Christopher Ben Bartholomeusz

Rodney J Goldhammer

A controller controls Pulse Width Modulation (PWM) signals of one or more phases. The controller includes a phase sequencer to select a phase, a common ramp generator generating a common ramp signal, a phase activation circuit to turn on the PWM signal of the selected phase based on the common ramp signal, and for each phase a Current Sense plus Ramp (CSR) signal generator to generate a phase CSR signal according to a current of the phase and a phase deactivation circuit to turn off the PWM signal of the phase based on the phase CSR signal. A method of controlling PWM phases comprises selecting a phase, generating a common ramp signal, turning on the PWM signal of the selected phase based on the common ramp signal, generating CSR signals according to currents of the phases, and turning off the PWM signals based on the respective CSR signals.

Multi-phase control for pulse width modulation power converters

A circuit generates an output voltage from an input voltage and includes a Pulse Width Modulation (PWM) controller. The PWM controller initiates a PWM pulse according to a first comparison that uses a Current Sense and Ramp (CSR) signal and an error signal. The PWM controller ends the PWM pulse according to a second comparison that uses the CSR signal and a threshold signal. The CSR signal is generated using a current sense signal and a ramp signal according to the input voltage. The error signal is generated from the output voltage and a reference voltage. In an embodiment, the circuit is one of a plurality of substantially identical modules, wherein one module is a master module. The master module generates an error signal used by each module. A clock input of each module is respectively connected to a clock output of another module to sequentially activate each of the modules.

Pulse width control for switching mode power converters

A voltage regulator includes a control circuit, a switch circuit, a first over-current protection circuit, and a second over-current protection circuit. The control circuit generates a pulse-width modulation (PWM) signal having a duty cycle proportional to an output voltage of the voltage regulator. The first over-current protection circuit blocks the PWM signal when an over-current condition exists during an off time of the PWM signal until a low-side switch current-sense level in the switch circuit drops below a set current limit level, while the second over-current protection circuit turns off the PWM signal when an over-current condition occurs during an on time of the PWM signal when a ramp adjusted voltage level added to the low-side switch current-sense level exceeds a summed level of the set current limit level and a set threshold.

Over-current protection circuit and method for voltage regulators

In one embodiment, a method of forming a ripple suppressor circuit includes a configuring the ripple suppressor circuit to receive a first signal that is representative of a requested voltage and a second signal that is a filtered value of the first signal. The method also includes configuring the ripple suppressor circuit to determine a peak value of the second signal responsively to the first signal and to determine a minimum value of the second signal responsively to the first signal. The method may also include configuring the ripple suppressor circuit to form an average value of the peak value and the minimum value.

Ripple suppressor circuit and method therefor

In one embodiment, a method of forming a multi-channel power supply controller includes forming a plurality of channels configured to regulate an output voltage between first and second values, configuring the controller to select a channel that has a lowest current value and initiate forming a drive signal for that channel responsively to the output voltage having a value that is less than the first value, configuring a reset circuit for each channel to terminate the respective drive signal responsively to at least the output voltage having a value greater than the first value.

Multi-phase power supply controller and method therefor

A power supply monitoring system generates a monitor signal having information on more than one aspect of the power supply output. In one example embodiment, the monitor signal may be implemented as a square wave in which the duty cycle is proportional to output current, the peak amplitude is proportional to output voltage, and the average value is equal to output power.

Power supply output monitor

A digital blanking circuit allows a first digital input signal transition to be passed on to a following stage, but prohibits the passing of subsequent transitions for a predetermined blanking interval. One embodiment of the present invention employs rising edge and falling edge latches, the inputs of which receive the digital input signal and the outputs of which are connected to a two-to-one multiplexer. The mux output is connected to a blanking interval circuit, which is triggered to begin timing a blanking interval by a multiplexer output transition. The blanking interval circuit provides outputs which control the latches and selects the latch output to be transferred to the multiplexer output such that the multiplexer output is prevented from transitioning during a blanking interval. An 'adaptive' blanking circuit is also described in which the blanking interval is terminated when the transition which triggered the start of the blanking interval propagates through an entire signal path, such that the blanking interval is automatically adjusted to be the same as the signal path delay.

Digital banking circuit

A switched noise filter circuit for DC-DC converters which use the instantaneous output voltage to establish the converter's duty ratio. The converter cycles the switching element on and off for time intervals Tand T, respectively. A switching control circuit includes a filter capacitance connected between the feedback node and ground, and a comparator which compares a feedback voltage Vwith a fixed voltage V; at least one of Tand Tis a 'modulated' interval which is terminated when Vcrosses Vdue to the discharge of the filter capacitance. A switched noise filter circuit applies an offset voltage to Vduring at least one of T, and T, with the offset voltage disconnected from Vby the beginning of the modulated interval or shortly thereafter. When the offset voltage is properly applied, the effect of extraneous electromagnetic noise coupled into Vis reduced.

Switched noise filter circuit for a DC-DC converter

A method and circuit enable a voltage regulator to employ the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries for large bidirectional step changes in load current. This is achieved with a technique referred to as &ldquo;optimal voltage positioning&rdquo;, which keeps the output voltage within the specified boundaries while employing an output capacitor which has a combination of the largest possible equivalent series resistance (ESR) and lowest possible capacitance that ensures that the peak voltage deviation for a step change in load current is no greater than the maximum allowed. The invention can be used with regulators subject to design requirements that specify a minimum time T,between load transients, and with those for which no T,is specified. When no T,is specified, optimal voltage positioning is achieved by compensating the regulator to ensure a response that is flat after the occurrence of the peak deviation, which enables the output voltage to remain within specified limits regardless of how quickly load transients occur. Another embodiment enables the power consumption of the device being powered by the regulator to be reduced under certain circumstances, while still employing the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries. The invention is applicable to both switching and linear voltage regulators.

Voltage regulator compensation circuit and method

A method and circuit enable a voltage regulator to employ the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries for large bidirectional step changes in load current. This is achieved by employing an output capacitor which has a combination of the largest possible equivalent series resistance (ESR) and lowest possible capacitance that ensures that the peak voltage deviation for a step change in load current is no greater than the maximum allowed, and by compensating the regulator to ensure a response that is flat after the occurrence of the peak deviation. The invention is applicable to both switching and linear voltage regulators.

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Dublin, CA, United States of America

Gabor Reizik