Honeywell International Inc.

Gabor Madl

Devesh Bhatt

David V Oglesby

Kirk A Schloegel

Stephen Otis Hickman

Arvind Easwaran

Kuntal Chakraborty

Kirk Schloegel

A method for automated error detection and verification of software comprises providing a model of the software, the model including one or more model inputs and one or more model outputs, and a plurality of blocks embedded within the model each with an associated block type, the block types each having a plurality of associated block-level requirements. The method further comprises topologically propagating from the model inputs, a range of signal values or variable values, and error bounds, across computational semantics of all the blocks to the model outputs. Each behavior pivot value for a given block is identified and examined to determine if modifying or extending the propagated range by the error bound will or may cause a signal value to fall on either side of the behavioral pivot value. All occurrences of the signal value that will or may fall on either side of the behavioral pivot value are reported.

Method for automated error detection and verification of software

Systems and methods for verifying model equivalence are provided. In one implementation, a system includes: a memory device that stores a reference model (RM) and comparison model (CM), wherein the CM and the RM are constrained by a set of rules; and a processing unit that generates a reference model representation (RMR) from the RM and stores the RMR on the memory device; the processing unit further generates a comparison model representation (CMR) from the comparison model (CM) and stores the CMR on the memory device, wherein the processing unit further to: verifies that the CMR compatibly implements the RMR; verifies that a CM data flow diagram derived from the CMR compatibly implements a RM data flow diagram derived from the RMR; and verifies that every CM semantic unit implements a behavior that corresponds to a RM semantic unit and every RM semantic unit is accounted for in the CM.

Systems and methods for verifying model equivalence

A system for verifying that a comparison model having folded expressions matches a reference model includes at least one memory device that stores a reference model and a comparison model, wherein the comparison model was previously generated based on the reference model. The reference model adheres to a first set of syntax and semantics, wherein the reference model includes a plurality of first expressions, each of the first expressions including a first operator and a first operand. The comparison model adheres to a second set of syntax and semantics, wherein the comparison model includes a second expression, the second expression including a second operator and a second operand. The system further includes a processing unit configured to match the second expression with the plurality of first expressions.

Systems and methods for verifying expression folding

Embodiments of the present subject matter can enable the analysis of signal value errors for system models. In an example, signal value errors can be propagated through the functional blocks of a system model to analyze possible effects as the signal value errors impact incident functional blocks. This propagation of the errors can be applicable to many models of computation including avionics models, synchronous data flow, and Kahn process networks.

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St. Louis Park, MN, United States of America

Gabor Madl