Fuji Xerox Co., Ltd.

Fumio Miyao

Yoichi Tan

Kazumi Tsukioka

Tomio Murayama

Shigefumi Takeuchi

A composite data transmission system wherein packet switching stations adapted to transmit data of the kind for which transfer delay and periodicity do not matter and operated to detect collisions between packets in the light of alterations in the DC voltage level of packet signals and circuit switching stations adapted to transmit data of the kind requiring periodic transmission are connected to one and the same transmission line, which composite data transmission system is characterized by causing DC voltage signals of a fixed magnitude to flow with prescribed periods through the transmission line thereby enabling the packet switching stations to recognize collisions and permitting the circuit switching stations to exchange communication during the existence of the packet switching stations' recognition of collisions and permitting the packet switching stations to exchange communication during the absence of the DC voltage signals' flow.

Composite data transmission system

In a multistation communication network for effecting time-sharing multiplex transmission and reception of digital signals in the form of packets by the use of optical cables, this invention establishes system timing by putting up a flag identifying a master station only in the packet signal issued by a personal station which has acquired priority in system timing, finding front guard time for the individual personal stations by arithmetic processing using the distances from an optical star coupler to the personal stations and the guard time at the position of the optical star coupler, and clocking the front guard time based on the timing of reception of the packet signal from the master station.

Method and device for synchronization of system timing

This invention provides a method for the correction of troubles in the digital signal transmission system, which enables system timing to be quickly established when there occurs collision of master packets for one cause or another. According to this invention, further transmission of master packets from the master stations which brought about a collision of the master packets is discontinued when the collision is detected, and a station having the highest priority for qualification as next master station to transmit master packets among the stations (exclusive or inclusive of those having transmitted the aforementioned master packets of the collision) is caused to transmit master packets in the blocks of the number in which the former master stations have been transmitting the master packets.

Method for correction of trouble in digital signal transmission system

In a digital signal transmission system for effecting time-division multiplexing/circuit switching transmission of data in the form of packets by means of transmission cable, a method for the synchronization of system timing which permits the establishment of system timing such as the synchronization of frames and blocks is improved. For this purpose, all of the individual personal stations in the transmission system have their own respective distance codes, and only the master station incorporates the distance code of transmitting personal station in its master packet, and the other personal stations than the master station independently calculate their own timing for sending out packets on the basis of the aforementioned data to establish their own system timing.

Digital signal transmission system

In a digital signal transmission system for effecting time-division multiplexing/circuit switching transmission of data in the form of packets by means of telecommunication cable, a packet configuration and line connection control data inserted in the packets are improved. In phases of the establishment/termination of a call, line connection control data of the overhead field are inserted as repeated at least one time into the data field. At least one set of line connection control data of the overhead field contains a parity bit. A receiving station reads the line connection control data in the overhead field and the data field of a received packet, and determines the overhead data by the principle of decision by majority. After completion of establishment of a call, the receiving station takes in the transferred data out of a block on the basis of a positional information, for example, a number of the block. In the phase of transmission of data, transmitting station inserts additional data bits into at least part of the overhead field in the packet being transmitted.

A modulated signal level detecting circuit comprising a synchronized detector 1 of the modulated input signal, a phase-locked loop 5, 14, 16 connected to the input signal for providing a reproduced carrier wave of the input signal, a switch 21 included in the phase-locked loop, and a signal level detecting circuit 22, 23 for detecting the level of the unmodulated signal and opening the switch and thereby breaking the loop when this level exceeds a fixed limit.

Carrier wave reproducing circuit in synchronized detection system of

The upward and downward transitions of an input signal are independently detected with undirectional hysteresis in opposite directions. The detection signals are then combined to provide a level crossing detection signal having no time lag and immune to small noise signals.

Zero-crossing point detection circuit

A carrier signal recovery circuit to be used in a receiving side of an image information transmitting apparatus, such as in a facsimile system, including an N-bit counter for counting reference clock pulses for a period corresponding to 2.sup.L (L being an integer) cycle periods of the received carrier signal. A first latch holds the most significant bits from the count of the N-bit counter while a second latch holds the least significant bits from the count of the N-bit counter. A frequency divider has a frequency dividing ratio corresponding to one cycle period of the carrier signal with the value of the frequency dividing ratio being initially set by the output of the first latch circuit. An auxiliary counter receiving an input from the second latch provides an output to the frequency divider for correcting the frequency dividing ratio such that the recovered carrier signal is outputted from the frequency divider.

Carrier wave recovery circuit

A keyed AGC circuit for use in a video data transmitting device such as a facsimile system which operates stably in the presence of external noise. A processing circuit is provided for carrying out digital processing determining whether the synchronizing signal level at an output terminal of the AGC circuit is higher or lower than a pre-set reference level. A multi-stage digital attenuator is controlled in response to outputs of the processing circuit to set the attenuation level. Control of the multi-stage digital attenuator can start with either the most significant bit position of the attenuator prior to video data transmission or with a least significant bit position of the attenuator in a synchronization period after video data transmission has been started.

Growing community of inventors

Ebina, Japan

Fumio Miyao