Shindengen Electric Manufacturing Company Limited

Fuminori Sasaoka

Toshiyuki Takemori

Yuji Watanabe

Masato Itoi

Kazushige Matsuyama

Kunihito Ohshima

Kunihito Oshima

A trench gate power MOSFET () includes: an n-type epitaxial layer (); a p-type body region () formed in the vicinity of an upper surface of the n-type epitaxial layer (); a plurality of trenches () formed so as to reach the n-type epitaxial layer () from an upper surface of the p-type body region (); and gates () formed in the trenches (). In some regions facing the p-type body region () in the n-type epitaxial layer (), p-type carrier extracting regions () are formed. According to the trench gate power MOSFET (), holes generated in a cell region can be effectively collected through the p-type carrier extracting regions () so as to further increase a speed of the switching operation.

Trench gate power semiconductor device

MOS FETs are formed by a drain layer, a drift layer, P-type body areas, N-type source areas, gate electrodes, a source electrode film, and a drain electrode film. In parallel to the MOS FETs, the drain layer, the drift layer, the P-type diffusion area, and the source electrode filmform a diode. The source electrode filmand the P-type diffusion areaform an Ohmic contact. The total amount of impurities, which function as P-type impurities in each P-type body area, is larger than the total amount of impurities, which function as P-type impurities in the P-type diffusion area

Semiconductor device for reducing forward voltage by using OHMIC contact

In a semiconductor device in which gate trenches and source trenches are formed, when the semiconductor device is flatly viewed, Ntype source areas are formed in parallel with the gate trenches to ease the miniaturization of the semiconductor device. Ptype diffusion areas are separately formed in a direction orthogonal to the Ntype source areas and the gate trenches. Thus, the Ntype source areas and a P type body layer are formed in a laminated state, but the Ptype diffusion areas are not laminated. Therefore, the structure of a mesa section is extremely simple. Furthermore, gate electrode films are connected to one another by a connection member. Thus, the semiconductor device has such a structure as to easily secure electric connection to each gate electrode film from outside. According to the foregoing structure, it is possible to extremely ease the miniaturization of the semiconductor device.

Growing community of inventors

Hanno, Japan

Fuminori Sasaoka