Sumitomo Electric Industries, Limited

Tohoku University

Fuminori Mitsuhashi

Yasunori Tateno

Masaki Ueno

Masaya Okada

Maki Suemitsu

Hirokazu Fukidome

Yoshiyuki Yamamoto

Masahiro Adachi

Takashi Ishizuka

Hiroyuki Nagasawa

Yusuke Yoshizumi

Kotaro Hirose

Yoshihiro Tsukuda

Shunsuke Fujii

A semiconductor device includes a graphene film disposed on a substrate and formed of atomic layers of graphene that are stacked, a source electrode and a drain electrode disposed on the graphene film, and a gate electrode disposed on the graphene film between the source electrode and the drain electrode with a gate insulator film interposed between the gate electrode and the graphene film, wherein a first number of the atomic layers of the graphene film in a source region where the source electrode is located and a drain region where the drain electrode is located is greater than a second number of the atomic layers of the graphene film in a channel region where the gate electrode is located.

Thin film transistor including a stacked multilayer graphene active layer

A photosensor includes: a support; a thermoelectric conversion material section that is disposed on a first main surface of the support and that includes a plurality of first material layers each having an elongated shape, a plurality of second material layers each having electrical conductivity and an elongated shape, and an insulating film, the first material layers and the second material layers each being configured to convert thermal energy into electrical energy; a heat sink that is disposed on a second main surface of the support and along an outer edge of the support; a light-absorbing film that is disposed in a region surrounded by inner edges of the heat sink as viewed in a thickness direction of the support so as to form temperature differences on the first main surface of the support in longitudinal directions of the first material layers.

Photosensor

A multilayer body includes a base portion and a graphene film. In an ion mass distribution versus depth of the multilayer body determined by time-of-flight secondary ion mass spectrometry, detection intensities of Cions have a maximum value at a depth of greater than 0 nm and 2.5 nm or less from an exposed surface. Detection intensities of Cions have a maximum value at a depth of greater than 0 nm and 3.0 nm or less from the exposed surface. Detection intensities of SiCions have a maximum value at a depth of 0.5 nm or greater and 5.0 nm or less from the exposed surface. Detection intensities of SiC ions have a maximum value at a depth of 0.5 nm or greater and 10.0 nm or less from the exposed surface. Detection intensities of Siions have a maximum value at a depth of 0.5 nm or greater and 10.0 nm or less from the exposed surface. A value obtained by dividing the maximum value of the detection intensities of SiCions by an average of detection intensities of SiCions associated with a region of the multilayer body is 1 or greater and 3.5 or less, the region having distances from the exposed surface in a thickness direction of the multilayer body of equal to or greater than 8 nm and 12 nm or less.

Multilayer body and electronic device

A stack includes a base portion consisting of silicon carbide and having a first surface that is a Si face and a carbon atom thin film disposed on the first surface and including a first main surface facing the first surface and a second main surface that is a main surface on an opposite side from the first main surface. The carbon atom thin film consists of carbon atoms. The carbon atom thin film includes at least one of a buffer layer that is a carbon atom layer including carbon atoms bonded to silicon atoms forming the Si face and a graphene layer. The second main surface includes a plurality of terraces parallel to the Si face of the silicon carbide forming the base portion and a plurality of steps connecting together the plurality of terraces.

Stack, electronic device, and method for manufacturing stack

A stacked body includes: a substrate made of silicon carbide and having a first main surface forming an angle of 20&#xb0; or less with a silicon plane; and a graphene film disposed on the first main surface and having an atomic arrangement oriented in relation to an atomic arrangement of silicon carbide forming the substrate. In an exposed surface of the graphene film which is a main surface opposite to the substrate, an area ratio of a region having a full width at half maximum of G' of 40 cmor less under Raman spectroscopy analysis is 50% or more. Accordingly, the stacked body is provided that enables a high mobility to be stably ensured in an electronic device manufactured to include the graphene film forming an electrically conductive portion.

Stacked body including graphene film and electronic device including graphene film

A stacked body includes: a substrate made of silicon carbide and having a first main surface forming an angle of 20&#xb0; or less with a carbon plane; and a graphene film disposed on the first main surface and having an atomic arrangement oriented in relation to an atomic arrangement of silicon carbide forming the substrate. In an exposed surface of the graphene film as seen in plan view, 10 or less regions are present per 1 mm, the exposed surface being a main surface opposite to the substrate, and the regions each including 10 or more graphene layers and having a circumcircle with a diameter of 5 &#x3bc;m or more and 100 &#x3bc;m or less. Accordingly, the stacked body is provided that enables a high mobility to be stably ensured in an electronic device manufactured to include the graphene film forming an electrically conductive portion.

Stacked body and electronic device

A silicon carbide (SiC) structure and a method of forming the SiC structure are disclosed. The SiC structure includes an SiC substrate and a film provided on the SiC substrate. The SiC substrate contains both of a hexagonal close packed (hcp) structure and a face centered cubic (fcc) structure, and has only one of the hcp surface and the fcc surface, where the hcp surface includes atoms in the topmost layer whose rows overlap with rows of atoms in the third layer, while, the fcc surface includes atoms in the topmost layer whose rows are different from rows of atoms in the third layer.

SiC structure, semiconductor device having SiC structure, and process of forming the same

An electron device having a channel layer made of graphene is disclosed. The electron device includes a graphene layer on a substrate, and a source electrode, a drain electrode, and a gate insulating film on the graphene layer. The electron device further includes a first gate electrode on the gate insulating film between the source electrode and the drain electrode, and a second gate electrode within the substrate. For the second gate electrode, another gate insulating film is on the graphene layer, or alternatively, a part of the substrate is interposed between the second gate electrode and the channel layer.

Semiconductor device

A substrate includes: a support substrate having a first main surface and a surface layer region which includes at least the first main surface and is formed of any one material selected from the group consisting of boron nitride, molybdenum disulfide, tungsten disulfide, niobium disulfide, and aluminum nitride; and a graphene film disposed on the first main surface and having an atomic arrangement oriented in relation to an atomic arrangement of the material forming the surface layer region. Accordingly, the substrate is provided that enables a high mobility to be stably ensured in an electronic device manufactured to include the graphene film forming an electrically conductive portion.

Substrate and electronic device

A layered semiconductor includes a base layer including a substrate and a buffer layer, and a drift layer which is disposed on the base layer and is made of GaN and whose conductivity type is an n-type. The drift layer has an average n-type impurity concentration of 1.5&#xd7;10cmor less in a radial direction of the substrate, and the difference between the maximum n-type impurity concentration and the minimum n-type impurity concentration is 1.5&#xd7;10cmor less.

Layered semiconductor having base layer including GaN substrate

A laminated body includes: a substrate portion composed of silicon carbide; and a graphene film disposed on a first main surface of the substrate portion, the graphene film having an atomic arrangement oriented with respect to an atomic arrangement of the silicon carbide of the substrate portion. A region in which a value of G'/G in Raman spectrometry is not less than 1.2 is not less than 10% in an area ratio in an exposed surface of the graphene film, the exposed surface being a main surface of the graphene film opposite to the substrate portion.

Growing community of inventors

Itami, Japan

Fuminori Mitsuhashi