Nec Corporation

Renesas Electronics Corporation

Nec Electronics Corporation

Nec Corporaiton

Fuminori Ito

Yoshihiro Hayashi

Hironori Yamamoto

Munehiro Tada

Hiroto Ohtake

Tatsuya Usami

Akihiko Okamoto

Tsuneo Takeuchi

Yoshimichi Harada

Kazuo Konuma

Yoshinori Tomihari

Yuko Okada

Masayoshi Tagami

The deposition rate of a porous insulation film is increased, and the film strength of the porous insulation film is improved. Two or more organic siloxane raw materials each having a cyclic SiO structure as a main skeleton thereof, and having mutually different structures, are vaporized, and transported with a carrier gas to a reactor (chamber), and an oxidant gas including an oxygen atom is added thereto. Thus, a porous insulation film is formed by a plasma CVD (Chemical Vapor Deposition) method or a plasma polymerization method in the reactor (chamber). In the step, the ratio of the flow rate of the added oxidant gas to the flow rate of the carrier gas is more than 0 and 0.08 or less.

Porous insulation film, and a semiconductor device including such porous insulation film

Method for manufacturing a porous insulation film and a method for manufacturing a semiconductor device comprising a porous insulation film

A method includes forming an insulating film over a substrate by introducing a cyclic siloxane compound having a cyclic siloxane as a skeleton and having at least one volatile hydrocarbon group bonded to a side chain, and a silicon-containing compound into a plasma, and converting the insulating film to a porous insulating film by adding energy to the insulating film. The silicon-containing compound is decomposed using less energy as compared with the skeleton of the cyclic siloxane compound, the volatile hydrocarbon group, and the bond between the cyclic siloxane compound and the volatile hydrocarbon group.

Method of manufacturing porous insulating film

A method of forming a porous insulation film uses an organic silica material gas having a 3-membered SiO cyclic structure and a 4-membered SiO cyclic structure, or an organic silica material gas having a 3-membered SiO cyclic structure and a straight-chain organic silica structure, and uses a plasma reaction in the filming process. A porous interlevel dielectric film having a higher strength and a higher adhesive property can be obtained.

Method of forming a porous insulation film

A method for forming an interlayer dielectric film by a plasma CVD method, including turning off a radio frequency power and purging with an inert gas simultaneously.

Method for forming interlayer dielectric film, interlayer dielectric film, semiconductor device and semiconductor manufacturing apparatus

There are provided with a wiring structure and a method for manufacturing the same wherein in a wiring structure of multi-layered wiring in which a metal wiring is formed on a substrate forming a semiconductor element thereby obtaining connection of the element, no damage to insulation property between the abutting wirings by occurrence of leakage current and no deterioration of insulation resistance property between the abutting wirings are achieved in case that fine metal wiring is formed in a porous insulation film. The insulation barrier layeris formed between an interlayer insulation film and the metal wiring, in the metal wiring structure on the substrate forming the semiconductor element. The insulation barrier layer enables to reduce leakage current between the abutting wirings and to elevate the insulation credibility.

Wiring structure and method for manufacturing the same

A semiconductor device manufacturing method for manufacturing a semiconductor device having a transistor mounted in a wiring of a plural-layer structure includes in manufacturing the semiconductor device that is formed on a semiconductor element and includes a barrier insulating film, a porous interlayer insulating film, a wiring, a via plug formed by embedding a metal wiring material in a wiring trench, and a via hole formed in the porous interlayer insulating film, irradiating an electron beam or an ultraviolet ray onto at least a portion of the porous interlayer insulating film before forming an opening in the barrier insulating film.

Wiring structure, semiconductor device and manufacturing method thereof

A method of forming a semiconductor device includes forming a trench on a porous insulating film, placing a chemical material including a structure comprising &#x2014;Si&#x2014;O&#x2014; including vinyl group on a surface of the porous insulating film or in the porous insulating film, and performing polymerization of the chemical material to provide a dielectric film having a density higher than that of porous insulating film on the surface of the trench. The structure may be a structure defined by a formula 1.

Semiconductor device including porous layer covered by poreseal layer

The present invention provides a multilayer wiring technology by which high adhesiveness and high insulation reliability between wirings are obtained, while maintaining effective low capacitance between wirings. A semiconductor device is characterized in that a first insulating film is an insulating film formed of at least one layer which contains a siloxane structure containing silicon, oxygen and carbon; the siloxane structure in the inner part of the first insulating film contains a larger number of carbon atoms than the number of silicon atoms; and a modified layer which containing a smaller number of carbon atoms and a larger number of oxygen atoms per unit volume than the inner part of the first insulating film is formed on at least one of an interface between the first insulating film and the metal and an interface between the first insulating film and a second insulating film.

Semiconductor device

Method of manufacturing porous insulating film, method of manufacturing semiconductor device, and semiconductor device

Semiconductor device, method for manufacturing semiconductor device and apparatus for manufacturing semiconductor

A semiconductor device with a high-strength porous modified layer having a pore size of 1 nm or less, which is formed, in a multilayer wiring forming process, by forming a via hole and a wiring trench in a via interlayer insulating film and a wiring interlayer insulting film and then irradiating an electron beam or an ultraviolet ray onto the opening side walls.

A field emission type cold cathode, comprising a substrate having a conductivity at least on the surface thereof, an insulation layer formed on the substate and having a first opening part, a gate electrode layer formed on the insulation layer, having a center generally aligned with the center of the first opening part, and having, therein, a second opening part having an opening diameter larger than the opening diameter of the first opening part, and an emitter layer formed in the first opening part, the emitter layer characterized by further comprising the bottom surface and the side surfaces of the first opening part.

Field emission type cold cathode and method of manufacturing the cold cathode

A fabrication method for an emitter includes the steps of forming on a glass substrate a CNT film which contains a plurality of carbon nanotubes (CNTs) and constitutes an emitter electrode, forming a gate electrode via an insulating film on the CNT film, forming a plurality of gate openings in the gate electrode and the insulating film, and aligning upright the CNTs in the gate opening. The upright alignment generates a stable uniform emission current and provides excellent emission characteristics.

Growing community of inventors

Tokyo, Japan

Fuminori Ito