Nec Compound Semiconductor Devices, Ltd.

Nec Corporation

Fuminobu Ono

Yoshikazu Nishimura

An active bias circuit having a combined configuration of the Wilson and Widlar current source configurations is provided, which makes it possible to set the output bias voltage at approximately zero (0V) even if a reference voltage applied to generate a reference current does not reach 0V. This circuit comprises cascode-connected first and second transistors, cascode-connected third and fourth transistors, and a resistor with a specific voltage drop generated by a current flowing through the same. The absolute value of the output bias voltage is decreased by the value of the voltage drop of the resistor compared with the case where the resistor is not provided. The resistor is provided between the gates/bases of the first and third transistors, or between the gate/base and source/emitter of the fourth transistor.

Active bias circuit having Wilson and Widlar configurations

An active bias circuit having a combined configuration of the Wilson and Widlar current source configurations is provided, which makes it possible to set the output bias voltage at approximately 0V even if a reference voltage applied to generate a reference current does not reach 0V. This circuit comprises cascode-connected first and second transistors, cascode-connected third and fourth transistors, and a diode with a specific forward voltage drop generated by a current flowing through the diode itself. The absolute value of the output bias voltage is decreased by the value of the forward voltage drop of the diode compared with the case where the diode is not provided. The diode is provided between the source/emitter of the third transistor and the drain/collector of the fourth transistor, or between the connection point of the third and fourth transistors and the output terminal, or the gates/bases of the first and third transistors.

Active bias circuit having wilson and widlar configurations

An active bias circuit having a combined configuration of the Wilson and Widlar current source configurations is provided, which makes it possible to set the output bias voltage at approximately zero (OV) even if a reference voltage applied to generate a reference current does not reach OV. This circuit comprises cascode-connected first and second transistors cascode-connected third and fourth transistors, and a resistor with a specific voltage drop generated by a current flowing through the same. The absolute value of the output bias voltage is decreased by the value of the voltage drop of the resistor compared with the case where the resistor is not provided. The resistor is provided between the gates/bases of the first and third transistors, or between the gate/base and source/emitter of the fourth transistor.

In semiconductor device manufacturing apparatus and method, in a joining process of a semiconductor pellet (2) and a package (1), the semiconductor pellet (2) is kept to a temperature equilibrium state under an actual use temperature condition while a low melting-point soldering member (3) is interposed between the semiconductor pellet (2) and the package (1), and the electrode pads (9) on the upper surface of the semiconductor pellet (2) and the electrode terminals (8) of the collet (5), which is electrically connected to the output terminal of a high voltage electric pulse source (4), are fitted and electrically connected to each other. Subsequently, a high voltage electric pulse is produced in the high voltage electric pulse source (4) and applied to the electrode pads (9) to melt the low melting-point soldering member (3), causing joining of the package (1) and the semiconductor pellet (2). The joining treatment can be performed under the actual use temperature condition of the semiconductor pellet (2), and thermal stress to the semiconductor pellet (2) is suppressed and the lifetime of the semiconductor pellet (2) can be increased.

Growing community of inventors

Tokyo, Japan

Fuminobu Ono