Seiko Epson Corporation

Namics Corporation

Fumikazu Komatsu

Mitsuaki Sawada

Shoichiro Kasahara

Akio Tsutsumi

Yasunari Furuya

Takemi Yonezawa

Atsushi Tanaka

Hidehiko Yajima

Takashi Kurashina

Takuya Ishida

Yoshiyuki Kamihara

Minoru Kozaki

Kiminori Nakajima

Naoki Il

Masaaki Abe

Chisato Akiyama

Issei Aoki

Munetoshi Kusama

Hiroshi Takasugi

A circuit device includes first and second output signal lines from which first and second output signals constituting differential output signals are output, and first to n-th output drivers coupled to the first and second output signal lines. In a first mode, i number of output drivers of the first to n-th output drivers drive the first and second output signal lines based on first and second input signals constituting differential input signals. In a second mode, j number of output drivers of the first to n-th output drivers drive the first and second output signal lines based on the first and second input signals.

Circuit device, oscillator, electronic apparatus, and vehicle

A circuit device includes an A/D converter circuit that performs A/D conversion by successive approximation using a charge redistribution type D/A converter circuit having capacitor array circuits on the positive electrode side and the negative electrode side, and quantization error hold circuits that hold charges corresponding to a quantization error in the A/D conversion. The quantization error hold circuits include quantization error hold circuits on the positive electrode side and the negative electrode side having one ends connected to sampling nodes of the capacitor array circuits on the positive electrode side and the negative electrode side. The quantization error hold circuits on the positive electrode side and the negative electrode side are placed on a second direction side orthogonal to a first direction in which the capacitor array circuits on the positive electrode side and the negative electrode side are placed.

Circuit device, vibration device, electronic apparatus, and vehicle

A resonator device includes first and second resonators and an integrated circuit device. The integrated circuit device includes a first oscillation circuit configured to oscillate the first resonator, a second oscillation circuit configured to oscillate the second resonator, and a processing circuit configured to perform processing by using frequency difference information or frequency comparison information between a first clock signal generated by oscillating the first resonator and a second clock signal generated by oscillating the second resonator. The first resonator is supported on the integrated circuit device by a first support portion. The second resonator is supported on the integrated circuit device by a second support portion.

Resonator device, electronic apparatus, and vehicle

An integrated circuit device includes: an AFE circuit (analog front-end circuit) that receives a first signal and a second signal, carries out waveform shaping of the first signal and waveform shaping of the second signal, outputs the first signal whose waveform is shaped to a first signal line, and outputs the second signal whose waveform is shaped to a second signal line; and a time-to-digital converter that receives the first signal from the AFE circuit via the first signal line, receives the second signal from the AFE circuit via the second signal line, and converts a time difference between transition timings of the first signal and the second signal into a digital value. At least one of the first signal line and the second signal line has redundant wiring for isometric wiring.

Integrated circuit device, physical quantity measuring device, electronic apparatus, and vehicle

A resonator device includes a first resonator that generates a reference clock signal, a second resonator that generates a first clock signal having a frequency adjusted based on the reference clock signal, and a circuit device that includes a temperature sensor for performing temperature compensation on an oscillation frequency of the first resonator. The temperature sensor is disposed on the circuit device such that the first resonator overlaps the temperature sensor in a plan view.

A resonator device includes first and second resonators and an integrated circuit. The integrated circuit includes first and second oscillation circuits that oscillate first and second resonators, first and second terminals connected to the first oscillation circuit, and third and fourth terminals connected to the second oscillation circuit. The first terminal of the integrated circuit and one electrode of the first resonator are connected to each other via a bump. The third terminal and one electrode of the second resonator are connected to each other via a bump. In a plan view, at least a portion of the first resonator overlaps the first oscillation circuit and at least a portion of the second resonator overlaps the second oscillation circuit.

An integrated circuit device includes a terminal region in which a second signal terminal to which a second signal is input is disposed, an AFE circuit (analog front-end circuit) that performs waveform shaping of the second signal, and a time-to-digital converter that converts a time difference between a transition timing of a first signal and a transition timing of the second signal subjected to waveform shaping, to a digital value. When a direction from a first side of the integrated circuit device toward a second side facing the first side is set as a first direction, the AFE circuit is disposed on the first direction side of the terminal region, and the time-to-digital converter is disposed on at least one side of the first direction side of the AFE circuit and a side of a direction intersecting the first direction.

An integrated circuit device includes a high-speed I/F circuit block which transfers data through a serial bus, and a driver logic circuit block which generates a display control signal. A first-conductivity-type transistor included in the high-speed I/F circuit block is formed in a second-conductivity-type well, and a second-conductivity-type transistor included in the high-speed I/F circuit block is formed in a first-conductivity-type well formed in a second-conductivity-type substrate to enclose the second-conductivity-type well. A first-conductivity-type transistor and a second-conductivity-type transistor included in the driver logic circuit block are formed in a region other than a region of the first-conductivity-type well for the high-speed interface circuit block.

Integrated circuit device and electronic instrument

An integrated circuit device includes a common transceiver macrocell including a circuit necessary for host operation and a circuit necessary for device operation. The common transceiver macrocell includes an analog front-end circuit and a high-speed logic circuit. The high-speed logic circuit includes a parallel/serial conversion circuit, a first parallel interface which serves as an interface between an external circuit and the parallel/serial conversion circuit, a sampling clock generation circuit, a serial/parallel conversion circuit, and a second parallel interface which serves as an interface between the serial/parallel conversion circuit and the external circuit.

A display driver includes an interface circuit block which is disposed in a second area ARof first to third areas ARto ARand transfers data through a serial bus using differential signals when a direction from a first side Lwhich is a short side of the display driver to a third side Lopposite to the first side Lis defined as a first direction DR, a direction from a fourth side Lwhich is a long side of the display driver to a second side Lopposite to the fourth side Lis defined as a second direction DR, and areas created by dividing the long side of the display driver into three portions along the first direction DRare defined as first to third areas ARto ARin that order, the interface circuit block including an input terminal formation area in which a plurality of input terminals PAD are formed, the input terminal formation area being disposed in the interface circuit block on the second side L

Display driver

A host controller includes a disconnection detection circuitwhich compares a voltage level of a first differential signal DP of first and second differential signals DP and DM making up a differential signal pair corresponding to a given range in a frame packet with a comparison voltage CV, compares a voltage level of the second differential signal DM corresponding to a given range in the frame packet with the comparison voltage CV, and detects that a host and a device have been disconnected when the voltage level of at least one of the first and second differential signals DP and DM corresponding to the given range is higher than the comparison voltage CV.

Host controller including a disconnection detection circuit

An integrated circuit device includes: first through fourth terminals arranged in order in which the first terminal and the fourth terminal are arranged in line symmetry with respect to a center axis of the first through fourth terminals, and the second terminal and the third terminal are arranged in line symmetry with respect to the center axis; a first receiving circuit coupled to the first and second terminals, the first receiving circuit receiving one of a first differential signal pair and a second differential signal pair; a second receiving circuit coupled to the third and fourth terminals, the second receiving circuit receiving the first differential signal pair when the first receiving circuit receives the second differential signal pair and the second differential signal pair when the first receiving circuit receives the first differential signal pair; a first selector selecting one of a first signal and a second signal obtained by inverting the first signal that are output from the first receiving circuit based on a select signal; a second selector selecting one of a third signal and a fourth signal obtained by inverting the third signal output from the second receiving circuit based on the select signal; and a third selector outputting each output of the first and second selectors by switching each output to a first output line and a second output line based on the select signal.

Integrated circuit device mountable on both sides of a substrate and electronic apparatus

A macrocell including a physical layer circuit includes a transmitter circuit and a receiver circuit connected with pads for differential signals DP and DM. The transmitter circuit includes a transmission driver which drives a signal line for the DP and a transmission driver which drives a signal line for the DM. When a direction from a side SDto a side SDof the macrocell is defined as a first direction, the transmission drivers are disposed on the side of the pads for the DP and DM in the first direction and are disposed line-symmetrically about a line SYL, and the receiver circuit is disposed on the side of the transmitter circuit in the first direction. A routing region of signal lines SLRand SLRfor connecting the receiver circuit with the pads for the DP and DM is provided in the region between the transmission drivers.

Macrocell, integrated circuit device, and electronic instrument

An integrated circuit deviceincludes an interface circuit blockwherein, when a direction from a first side LSwhich is a short side of the interface circuit blockto a third side LSopposite to the first side LSis defined as a first direction DRand a direction from a fourth side LSwhich is a long side of the interface circuit blockto a second side LSopposite to the fourth side LSis defined as a second direction DRthe interface circuit blockincludes a circuit formation areain which a circuit which performs given processing is formed, an input terminal formation areawhich is disposed on a side of the circuit formation areain the second direction DRand in which a plurality of input terminals PAD are provided on the second side LSalong the first direction DRand a plurality of power supply lines DRVSS and DRVDDto DRVDDfor the integrated circuit deviceformed to extend along the first direction DRin the input terminal formation areain an interconnect layer ALC in a lower layer of an interconnect layer ALE in which the input terminals PAD are formed.

Integrated circuit device

An integrated circuit device includes a first transfer mode first transmitter circuit including first and second transmission drivers and a second transfer mode second transmitter circuit including third and fourth transmission drivers. A transistor PTof the first transmission driver and a transistor PTof the third transmission driver are formed in a P-type transistor area ARP, a transistor NTof the first transmission driver and a transistor NTof the third transmission driver are formed in an N-type transistor area ARN, a transistor PTof the second transmission driver and a transistor PTof the fourth transmission driver are formed in a P-type transistor area ARP, and a transistor NTof the second transmission driver and a transistor NTof the fourth transmission driver are formed in an N-type transistor area ARN

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Okaya, Japan

Fumikazu Komatsu