Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Engineering Company, Limited

Fumihiro Ryoho

Terunori Kubo

Taiki Nishiuchi

Hiroaki Kanno

A constant voltage generation circuit in which a charging circuit (T1) connected to one side of resistors (LR2 to LR5) rapidly supplies a higher voltage, that is further higher than any voltage generated at each of the resistors (LR2 to LR5), to the output terminal (OT) during a desired time period when one of switches (SW2 to SW4) turns on to provide the voltage to be switched to the output terminal (OT) and when the voltage to be switched is higher than a current voltage of the output terminal (OT). Furthermore, in the circuit, a charging circuit (T2 ) connected to other side of resistors (LR2 to LR5) rapidly supplies a lower voltage, that is further lower than any voltage generated at each of the resistors (LR2 to LR5), to the output terminal (OT) during a desired time period when one of switches (SW2 to SW4) turns on to provide the voltage to be switched to the output terminal (OT) and when the voltage to be switched is lower than a current voltage of the output terminal (OT).

Constant voltage generation circuit

A semiconductor memory device with low current consumption is disclosed. A bit line selecting circuit (3) establishes electrical connection between a bit line (BL) selected during a read period and a node (N2) in response to bit line connection/selection signals (SB0 to SB4). A charge-up circuit (7) includes PMOS transistors (Q29, Q30). The PMOS transistor (Q29) has a source connected to a power supply (V.sub.DD), a drain connected to a drain of a transistor (Q10) of the bit line selecting circuit (3), and a gate receiving a read control signal (SC). The PMOS transistor (Q30) has a source connected to the power supply (V.sub.DD), a drain connected to the drain of the transistor (Q10) of the bit line selecting circuit (3), and a gate fixed at a ground level.

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Tokyo, Japan

Fumihiro Ryoho