Mitsumi Electric Company Ltd.

Minebea Mitsumi Inc.

Funai Electric Company Ltd.

Calsonic Kansei Corporation

The University of Electro-communications

Fumihiro Inoue

Kosuke Yamamoto

Taketomo Nakane

Shinya Otsuka

Katsumi Nakamura

Hiroshi Koizumi

Junichi Kimura

Yasuo Masaki

Naoto Endo

Hirono Tsubota

Makio Abe

Heisuke Nakashima

Hironori Muramoto

Tomoki Segawa

Hitoshi Shima

Kenji Mitsuhira

Hiroyoshi Morita

Akira Mogi

Kouji Edamura

Katsuji Mashio

Yukinobu Take

Takahiko Bando

A signal processing circuit includes a first sampling capacitor and a second sampling capacitor that are connected for an input signal path of an analog signal, and a signal processor configured to perform predetermined processing on the analog signal sampled by the first sampling capacitor and the analog signal sampled by the second sampling capacitor. The sampling of the analog signal transmitted to one capacitor of the first sampling capacitor and the second sampling capacitor, and the predetermined processing performed by the signal processor on the analog signal sampled by another capacitor of the first sampling capacitor and the second sampling capacitor can be performed in parallel.

Signal processing circuit

A switched capacitor circuit includes a first charge-to-voltage converter including a first capacitor to operate in a first period to convert a first charge into a first output voltage. The switched capacitor circuit includes a second charge-to-voltage converter including a second capacitor to operate in a second period to convert a second charge into a second output voltage, the second period being different from the first period. The switched capacitor circuit includes a shield interconnect disposed between the first capacitor and the second capacitor, the shield interconnect having a constant potential.

Switched capacitor circuit

A sensor includes a substrate, a reference electrode provided above the substrate, a lower electrode provided above the reference electrode via an insulating film, and an upper electrode provided above the lower electrode via a physical quantity detecting film. The upper electrode and the lower electrode form a parallel-plate-type detection capacitor, and the lower electrode and the reference electrode form a parallel-plate-type reference capacitor.

Sensor

The detecting device includes a detecting unit including a first electrode and a second electrode, the first electrode and the second electrode being used as a first capacitor. The detecting device includes a drive unit configured to apply a first drive signal to the first drive terminal such that the first drive signal is alternately inverted between a first period and a second period. The detecting device includes a converting unit configured to convert a charge charged at the signal terminal into a voltage and includes a difference processing unit configured to obtain a difference between the first output voltage and the second output voltage.

Detecting device

A D/A converter for converting a digital signal with a predetermined number of bits to an analog signal, the D/A converter includes a plurality of component groups that include a plurality of components included in the D/A converter and are connected to an output unit for outputting the analog signal in a predetermined order; and a start position change unit that changes a start position within the plurality of the component groups used for generating a single analog signal by using a predefined shift pattern when generating the single analog signal corresponding to the digital signal.

D/A converter, and A/D converter

A DC-DC converter, which allows a current to pass through an inductor and rectifies the current through the inductor to convert an input direct current voltage supplied from a direct current power unit into a direct current voltage at a different potential and output the direct current voltage, includes a switching control circuit performing peak-current control procedures including turning on the switching element when the converted direct current voltage drops to a predetermined potential and turning off the switching element when the current through the inductor reaches a predetermined value. The converter includes a copied-current generating circuit generating a current proportional to the output current. The switching control circuit turns off the switching element when the circuit detects that the current through the inductor reaches a predetermined value with reference to a combined current of the copied current generated at the copied-current generating circuit and a predetermined reference current.

DC-DC converter and load-driving semiconductor integrated circuit

A capacitive-load driver circuit that is connected to terminals connected to capacitive loads and an output stage of an amplifier for feeding output voltages to the terminals to drive the capacitive loads. The capacitive-load driver circuit temporarily feeds a current during a transition period of the output voltages from one of the terminals transitioning from a high voltage state to a low voltage state to another terminal transitioning from a low voltage state to a high voltage state. The capacitive-load driver circuit includes a current-variation detector circuit and a charge transfer circuit. The current-variation detector circuit detects a variation in a current at the output stage. The charge transfer circuit feeds a predetermined current to one of the terminals to transfer charges from a capacitive load connected to a high voltage terminal to a capacitive load connected to a low voltage terminal.

Capacitive-load driver circuit and optical scanner

A successive approximation AD converter includes a DA converter that converts a higher conversion data greater than an approximate value into an analog higher converted voltage and converts a lower conversion data less than the approximate value into an analog lower converted voltage; a sample-and-hold circuit that samples and holds voltage differences between an input voltage and each of the higher converted voltage and the lower converted voltage; a comparator that outputs a first comparison result indicating whether the input voltage is greater or less than the higher converted voltage and a second comparison result indicating whether the input voltage is greater or less than the lower converted voltage; and an operation unit that changes the approximate value based on the first comparison result and the second comparison result, and changes a next higher conversion data and a next lower conversion data based on the changed approximate value.

Successive approximation AD converter and successive approximation AD conversion method

An oscillation circuit includes a condenser, a charging/discharging part configured to switch between charging and discharging of the condenser according to a control signal, a comparator configured to compare a voltage of the condenser with a reference voltage and output a comparison result signal, a flip-flop configured to be set or reset according to the comparison result signal, supply an output signal as the control signal to the charging/discharging part, and output the output signal as an oscillation signal, and a current control part configured to control an operating current of the comparator in correspondence with the voltage of the condenser.

Oscillation circuit and operating current control method thereof

Disclosed is a comparator including a switching element, a differential pair, and a positive feedback part, the positive feedback part including a first CMOS inverter and a second CMOS inverter, the first CMOS inverter including a first element for providing a potential difference between a first PMOS transistor and a first NMOS transistor, the second CMOS inverter including a second element for providing a potential difference between a second PMOS transistor and a second NMOS transistor, a higher potential side of the first element being connected to a gate of the second NMOS transistor, a lower potential side of the first element being connected to a gate of the second PMOS transistor, a higher potential side of the second element being connected to a gate of the first NMOS transistor, and a lower potential side of the second element being connected to a gate of the first PMOS transistor.

Comparator and ad converter provided therewith

A step-up circuit includes a capacitor, a transistor connected to the capacitor, and a reference voltage generator circuit configured to supply the transistor with a reference voltage that causes a rate of voltage increase relative to supply voltage to vary in accordance with the supply voltage.

Step-up circuit having reference voltage generator to control voltage increase in accordance with supply voltage

A differential circuit includes a first input part; a second input part; a reference voltage input part, the reference voltage input part being common to form differential pairs; a current source that drives the differential pairs; a current mirror that generates a first output current and a second output current, according to a current that flows through the reference voltage input part according to at least one voltage difference of first and second voltage differences; a first output part that outputs a signal according to the first voltage difference, according to a current that flows through the first input part according to the first voltage difference and the first output current; and a second output part that outputs a signal according to the second voltage difference, according to a current that flows through the second input part according to the second voltage difference and the second output current.

Differential circuit

A bias voltage generation circuit includes a first current source connected to a first power source; a first transistor which is diode connected and is connected to the first current source; a second transistor connected between the first transistor and a second power source; a second current source connected to the first power source; a third transistor connected to the second current source; a fourth transistor connected between the third transistor and the second power source; a first output point connected to the first transistor and the third transistor and outputs a first bias voltage; a second output point connected to the fourth transistor and the second current source and outputs a second bias voltage; and a bias voltage adjusting circuit which adjusts the first bias voltage in accordance with a control input.

Bias voltage generation circuit and differential circuit

An oscillator circuit includes a clock oscillator which outputs a main clock signal having an oscillating frequency switched between a high frequency and a low frequency in response to a frequency selection signal, and a frequency divider circuit which outputs a sub-clock signal having a divided frequency equivalent to a frequency division ratio of the oscillating frequency of the main clock signal, the frequency division ratio being switched in response to the frequency selection signal. The divided frequency of the sub-clock signal is predetermined for each of the high frequency and the low frequency to which the oscillating frequency is switched in response to the frequency selection signal.

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Tokyo, Japan

Fumihiro Inoue