Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Fumiaki Koga

Tokikazu Matsumoto

Takashi Inoue

Hiromu Kitaura

Nobuyuki Ogawa

During sleep mode, a power-source control section stops the power supply to a tuner, a demodulation section, an AV-data processing section and a microcomputer, and delivers a power supply only to a standby tuner. The standby tuner receives a start signal which is transmitted from a head end, using a frequency except a specific frequency which is received by the tuner, and outputs a power-supply instruction signal according to the start signal. The power-source control section executes a power supply to the tuner, the demodulation section, the AV-data processing section and the microcomputer, in response to the power-supply instruction signal.

Receiving apparatus, and display apparatus and television broadcasting system therewith

A time base correcting apparatus for reducing hindrance to a carrier chrominance signal due to clock jitter, when a sampling clock is generated by a digital circuit. In the time base correcting apparatus, a video signal is sampled with a clock synchronized with the video signal to be written to an FIFO memory. The video signal is then read out therefrom with a fixed clock to remove time base changes of the video signal. The fixed read clock is generated by multiplying two different frequency signals together, where one of the signals has a lower frequency approximately equal to (n+1/4) f (where n is an arbitrary integer, and f is a horizontal sync frequency) and using one of the resultant sidebands obtained through use of a bandpass filter. The read clock frequency is separated by 1/2 f from the other sideband frequency to reduce hindrance between the signals, and in turn to reduce viewable hindrances during the display of the video signal read out from the FIFO.

Apparatus for rejecting time base error of video signal

A video signal having a residual error superposed in the horizontal synchronizing signal period is received from a time axis error correcting circuit for suppressing the time axis error of video signal, and the residual error superposed portion is replaced with a specific data.

Video signal processing apparatus having timebase corrector and means

In a phase error detector for detecting a phase error .theta. of an input color burst signal from a phase of a reference signal from sin .theta. component and cos .theta. component, if either one of the sin .theta. component and cos .theta. component requires M bits for its expression, the both values are divided by a same value to shift in bits to be expressed in N bits (N&lt;M), thereby preventing the subsequent circuit from increasing in scale.

Circuit for detecting phase error of color burst signal

A digital phase locked loop for correcting the phase of an output signal with respect to an input signal has a phase comparator for comparing the phases of the input signal and a feedback signal from a variable frequency oscillator. The output signal of the phase comparator representing the phase difference is integrated in a low pass filter. The output of the low pass filter is supplied to a switch which alternately selects between the output of the low pass filter and a zero level signal from a zero generator. The output of the switch is supplied to the variable frequency oscillator. The output signal of the variable frequency oscillator is returned to the phase comparator, so that the phase of the output signal from the variable frequency oscillator is synchronized with the phase of the input signal.

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Osaka, Japan

Fumiaki Koga