Hitachi-high-technologies Corporation

Renesas Technology Corp.

Hitachi Ulsi Systems Co., Ltd.

Fumiaki Endo

Tomohiro Funakoshi

Junko Konishi

Masashi Sahara

Noritsugu Takahashi

Masanori Kojima

Katsuhiro Uchimura

Tsunehiro Sakai

Yuya Isomae

Yuko Kariya

Hideaki Kanazawa

Masakazu Sugiura

The objective is to improve a classification standard. Classification standard data, in which is registered image data information that is the standard when image data is classified, and classification data, in which is registered image data information that is the result when newly input image data is classified using the classification standard data, are stored in a storage unit. An image classification device is characterized in that when any image data information of the image data that is registered in the classification data is selected by means of an input unit, and an instruction to additionally register the selected image data information in the classification standard data is input by means of the input unit, the selected image data information is additionally registered in the classification standard data.

Image classification standard update method, program, and image classification device

A defect detected by a wafer inspection tool is reliably captured by a defect review tool. A defect review condition in the defect review tool is varied depending on defect attributes provided by the wafer inspection tool so as to optimize the review process. For example, review magnification is varied depending on the size of the defect, or the frame addition number is varied depending on the maximum gray level difference.

Wafer inspection data handling and defect review tool

In a high-performance semiconductor integrated circuit, the standby current is reduced by preventing current leakage in a semiconductor integrated circuit device, for example, the memory cell of an SRAM. A gate electrode G is formed on semiconductor substrateand n-type semiconductor regions(source/drain regions) are formed in the semiconductor substrate on both sides of this gate electrode. Within the same apparatus and under near-vacuum conditions, a depth of 2.5 nm or less is etched away from the surfaces of the source/drain regions and gate electrode, a film of Co is then formed on the source/drain regions, and thermal processing is applied to form CoSilayer. As a result, current leakage in the memory cell can be prevented and this method can be applied to semiconductor integrated circuit devices that have low current consumption or are battery-driven.

Semiconductor integrated circuit device and the process of the same

Growing community of inventors

Hitachinaka, Japan

Fumiaki Endo