Kabushiki Kaisha Toshiba

Nippon Telegraph and Telephone Public Corporation

Fujio Ishihara

Yukihiro Urakawa

Yukihiro Fujimoto

Toshihiko Himeno

Hiroshige Fujii

Kouji Houkawa

Ryubi Okuda

Kenichi Kuroda

Yahei Koyamada

This invention concerns a semiconductor integrated circuit device comprising a plurality of circuit elements arranged in a chip and operating in response to a same clock signal; clock buffers arranged at intersecting points decided based on positions of the plurality of circuit elements, the intersecting points being included in intersecting points of a pseudo mesh virtually assumed to cover up a region in the chip including the plurality of circuit elements; and a main wiring transmitting the clock signal to the clock buffers.

Semiconductor integrated circuit device having clock buffers and method for arranging the clock buffers on the device

A phase detector includes a first selection circuit configured to select a first clock from a first group of clocks supplied to the first selection circuit and to transmit the first clock, and at least one phase comparator configured to detect a difference in phases between the first clock and a second clock supplied to the phase comparator and to transmit the difference as a scan signal.

Phase detector, clock distribution circuit, and LSI

A semiconductor integrated circuit device comprises: a clock driver for outputting a clock signal; a clock wiring which is driven by the clock driver for transmitting the clock signal; a plurality of logic circuits which are connected to the clock wiring to be synchronously operated in response to the clock signal; and a plurality of delay circuits, each of which is provided between a corresponding one of the logic circuits and the clock wiring for delaying the clock signal, wherein a delay amount of each of the delay circuits is designed so that the delay amounts of the clock signal from the output of the clock driver to the inputs of the logic circuits are equal to each other. Thus, it is possible to reduce clock skew and to evade an increase in layout area.

Semiconductor integrated circuit device

A master portion may introduce input data thereinto in a low level period of a clock and then hold and output the input data therefrom in a high level period of the clock. A slave portion may introduce input data thereinto in the high level period of the clock and then hold and output the input data therefrom in the low level period of the clock. Two exclusive NOR circuits may compare present logic values of the input data with logic values in a preceding half period of the clock to determine coincidences therebetween respectively, and then control output states of the input data held in the master portion and the slave portion based on results of their comparisons.

Logic storing circuit and logic circuit

An impedance element is disclosed which is formed with an electro-elastic surface wave transducing device composed of a substrate for the propagation of an elastic surface wave and an electro-elastic surface wave transducer disposed on the substrate for converting an electrical signal into an elastic surface wave or vice versa. The impedance element has a frequency-impedance characteristic that it exhibits a sufficiently high impedance in a predetermined frequency band but a sufficiently low impedance in the other frequency bands. Further, a band-rejection filter is disclosed which includes the abovesaid impedance element and has a band-rejection filter characteristic dependent upon the frequency-impedance characteristic of the impedance element.

Impedance element and band-rejection filter using the same

An elastic surface wave filter is disclosed which is composed of a substrate for the propagation thereon of elastic surface waves and transmitting and receiving transducers, each having at least an electrode deposited on the major surface of the substrate and in which the transmitting and receiving transducers are disposed line connectin the major surface of the substrate a predetermined distance apart from each other; the electrode of one or both of the transmitting and receiving transducers is formed with first and second comb-shaped electrodes; and the first and second electrodes are disposed with each electrode element of the latter extending between adjacent ones of the electrode elements of the former. The electrode elements of the first and/or second comb-shaped electrodes are weighted in terms of length and the extent of the region of overlapping of the first and second comb-shaped electrodes in a first direction, i.e. parallel to a line connecting the transmitting and receiving transducers, is the same at any point in a second direction perpendicular to the first direction.

Elastic surface wave filter

An elastic surface wave propagation device is disclosed which is composed of a substrate for elastic surface wave propagation and at least one transducer disposed on the major surface of the substrate for converting an electric signal into an elastic surface wave or vice versa. The substrate is formed of quartz crystal and the major surface of the substrate is 43.degree. rotated Y cut plane of the quartz crystal. The angle between the direction of propagation of the elastic surface wave and the X-axis direction of the quartz crystal is selected to be in the range of 8.degree. to 12.degree. so that spurious components are sufficiently suppressed or negligible.

Growing community of inventors

Tokyo, Japan

Fujio Ishihara